From 28e9ead9e8aaec94abd2708cf2c85074e3a4f5e2 Mon Sep 17 00:00:00 2001
From: David Harris <david_harris@hmc.edu>
Date: Mon, 23 Jan 2023 05:06:27 -0800
Subject: [PATCH] Updated README

---
 README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.md b/README.md
index 26eb930b..45e503d9 100644
--- a/README.md
+++ b/README.md
@@ -5,7 +5,7 @@ Wally is a 5-stage pipelined processor configurable to support all the standard
 
 ![Wally block diagram](wallyriscvTopAll.png)
 
-Wally is described in a textbook, RISC-V System-on-Chip Design, by Harris, Stine, Thompson, and Harris.  See Appendix D for directions installing the RISC-V tool chain needed to use Wally.
+Wally is described in a textbook, RISC-V System-on-Chip Design, by Harris, Stine, Thompson, and Harris.  Users should follow the setup instructions below.  A system administrator must install CAD tools using the directions further down.
 
 New users may wish to do the following setup to access the server via a GUI and use a text editor.