diff --git a/pipelined/src/fpu/fma.sv b/pipelined/src/fpu/fma.sv
index dec492eb..950b55ff 100644
--- a/pipelined/src/fpu/fma.sv
+++ b/pipelined/src/fpu/fma.sv
@@ -51,7 +51,7 @@ module fma(
 
     logic [2*`NF+1:0]   Pm;           // the product's significand in U(2.2Nf) format
     logic [3*`NF+5:0]   Am;     // addend aligned's mantissa for addition in U(NF+5.2NF+1)
-    logic [3*`NF+6:0]   AmInv;   // aligned addend's mantissa possibly inverted
+    logic [3*`NF+5:0]   AmInv;   // aligned addend's mantissa possibly inverted
     logic [2*`NF+1:0]   PmKilled;      // the product's mantissa possibly killed
     ///////////////////////////////////////////////////////////////////////////////
     // Calculate the product
@@ -86,7 +86,7 @@ module fma(
     fmaadd add(.Am, .Pm, .Ze, .Pe, .Ps, .As, .KillProd, .ZmSticky, .AmInv, .PmKilled, .NegSum, .InvA, .Sm, .Se, .Ss);
 
    
-    fmalza lza(.A(AmInv[3*`NF+5:0]), .Pm({PmKilled, 1'b0, InvA&Ps&ZmSticky&KillProd}), .Cin(InvA & ~(ZmSticky & ~KillProd)), .sub(InvA), .SCnt);
+    fmalza lza(.A(AmInv), .Pm({PmKilled, 1'b0, InvA&Ps&ZmSticky&KillProd}), .Cin(InvA & ~(ZmSticky & ~KillProd)), .sub(InvA), .SCnt);
 endmodule
 
 
diff --git a/pipelined/src/fpu/fmaadd.sv b/pipelined/src/fpu/fmaadd.sv
index 4b52208c..53ed023f 100644
--- a/pipelined/src/fpu/fmaadd.sv
+++ b/pipelined/src/fpu/fmaadd.sv
@@ -37,7 +37,7 @@ module fmaadd(
     input logic                 ZmSticky,
     input logic  [`NE-1:0]      Ze,
     input logic  [`NE+1:0]      Pe,
-    output logic [3*`NF+6:0]    AmInv,  // aligned addend possibly inverted
+    output logic [3*`NF+5:0]    AmInv,  // aligned addend possibly inverted
     output logic [2*`NF+1:0]    PmKilled,     // the product's mantissa possibly killed
     output logic                NegSum,        // was the sum negitive
     output logic                InvA,          // do you invert the aligned addend
@@ -45,7 +45,7 @@ module fmaadd(
     output logic [`NE+1:0]      Se,
     output logic [3*`NF+5:0]    Sm           // the positive sum
 );
-    logic [3*`NF+6:0]    PreSum, NegPreSum; // possibly negitive sum
+    logic [3*`NF+5:0]    PreSum, NegPreSum; // possibly negitive sum
 
     ///////////////////////////////////////////////////////////////////////////////
     // Addition
@@ -57,7 +57,7 @@ module fmaadd(
     assign InvA = As ^ Ps;
 
     // Choose an inverted or non-inverted addend - the one has to be added now for the LZA
-    assign AmInv = InvA ? {1'b1, ~Am} : {1'b0, Am};
+    assign AmInv = InvA ? ~Am : Am;
     // Kill the product if the product is too small to effect the addition (determined in fma1.sv)
     assign PmKilled = Pm&{2*`NF+2{~KillProd}};
     // Do the addition
@@ -66,14 +66,14 @@ module fmaadd(
     // PreSum    -1 = don't add 1     +1 = add 2
     // NegPreSum +1 = add 2           -1 = don't add 1
     // for NegPreSum the product is set to -1 whenever the product is killed, therefore add 1, 2 or 0
-    assign PreSum = {{`NF+3{1'b0}}, PmKilled, 1'b0, InvA&ZmSticky&KillProd} + AmInv + {{3*`NF+6{1'b0}}, InvA&~((ZmSticky&~KillProd))};
-    assign NegPreSum = {1'b0, Am} + {{`NF+3{1'b1}}, ~PmKilled, 2'b11} + {(3*`NF+5)'(0), ZmSticky&~KillProd, ~(ZmSticky)};
+    assign {NegSum, PreSum} = {{`NF+3{1'b0}}, PmKilled, 1'b0, InvA&ZmSticky&KillProd} + {InvA, AmInv} + {{3*`NF+6{1'b0}}, InvA&~((ZmSticky&~KillProd))};
+    assign NegPreSum = Am + {{`NF+2{1'b1}}, ~PmKilled, 2'b11} + {(3*`NF+4)'(0), ZmSticky&~KillProd, ~(ZmSticky)};
      
     // Is the sum negitive
-    assign NegSum = PreSum[3*`NF+6];
+//    assign NegSum = PreSum[3*`NF+6];
 
     // Choose the positive sum and accompanying LZA result.
-    assign Sm = NegSum ? NegPreSum[3*`NF+5:0] : PreSum[3*`NF+5:0];
+    assign Sm = NegSum ? NegPreSum : PreSum;
     // is the result negitive
     //  if p - z is the Sum negitive
     //  if -p + z is the Sum positive