diff --git a/pipelined/src/fma/fma.do b/pipelined/src/fma/fma.do
index 9a7de126..6e6863d5 100644
--- a/pipelined/src/fma/fma.do
+++ b/pipelined/src/fma/fma.do
@@ -8,7 +8,7 @@ onbreak {resume}
 # create library
 vlib worklib
 
-vlog -lint -work worklib fma16.sv testbench.v
+vlog -lint -work worklib fma16.v testbench.v
 vopt +acc worklib.testbench_fma16 -work worklib -o testbenchopt
 vsim -lib worklib testbenchopt
 
diff --git a/pipelined/src/fma/lint-fma b/pipelined/src/fma/lint-fma
index 462d5350..290bf69f 100755
--- a/pipelined/src/fma/lint-fma
+++ b/pipelined/src/fma/lint-fma
@@ -5,4 +5,4 @@ export PATH=$PATH:/usr/local/bin/
 verilator=`which verilator`
 
 basepath=$(dirname $0)/..
-$verilator --lint-only --top-module fma16 fma16.sv
+$verilator --lint-only --top-module fma16 fma16.v
diff --git a/synthDC/scripts/synth.tcl b/synthDC/scripts/synth.tcl
index 3146e14e..d79009fe 100755
--- a/synthDC/scripts/synth.tcl
+++ b/synthDC/scripts/synth.tcl
@@ -28,6 +28,9 @@ eval file copy -force [glob ${hdl_src}/../config/shared/*.vh] {hdl/}
 eval file copy -force [glob ${hdl_src}/*/*.sv] {hdl/}
 eval file copy -force [glob ${hdl_src}/*/flop/*.sv] {hdl/}
 
+# Only for FMA class project; comment out when done
+eval file copy -force [glob ${hdl_src}/fma/fma16.v] {hdl/}
+
 # Enables name mapping
 if { $saifpower == 1 } {
     saif_map -start