diff --git a/pipelined/src/cache/cachereplacementpolicy.sv b/pipelined/src/cache/cachereplacementpolicy.sv
index 04a53b6c..1c412fef 100644
--- a/pipelined/src/cache/cachereplacementpolicy.sv
+++ b/pipelined/src/cache/cachereplacementpolicy.sv
@@ -52,56 +52,38 @@ module cachereplacementpolicy
   logic [INDEXLEN+OFFSETLEN-1:OFFSETLEN] 	PAdrD;
   logic [INDEXLEN-1:0] 				RAdrD;
   logic 					LRUWriteEnD;
-  
-  /* verilator lint_off BLKLOOPINIT */
-  always_ff @(posedge clk) begin
-    if (reset) begin
-      RAdrD <= '0;
-      PAdrD <= '0;
-      LRUWriteEnD <= 0;
-      NewReplacementD <= '0;
-      for(int index = 0; index < NUMLINES; index++)
-		ReplacementBits[index] <= '0;
-    end else begin
-      RAdrD <= RAdr;
-      PAdrD <= PAdr;
-      LRUWriteEnD <= LRUWriteEn;
-      NewReplacementD <= NewReplacement;
-      if (LRUWriteEnD) begin
-		ReplacementBits[PAdrD[INDEXLEN+OFFSETLEN-1:OFFSETLEN]] <= NewReplacementD;
-      end
-    end
-  end
-  /* verilator lint_on BLKLOOPINIT */
 
+  initial begin
+      assert (NUMWAYS == 2 || NUMWAYS == 4) else $error("Only 2 or 4 ways supported");
+  end
+  
+  // Pipeline Delay Registers
+  flopr #(INDEXLEN) RAdrDelayReg(clk, reset, RAdr, RAdrD);
+  flopr #(INDEXLEN) PAdrDelayReg(clk, reset, PAdr, PAdrD);
+  flopr #(1) LRUWriteEnDelayReg(clk, reset, LRUWriteEn, LRUWriteEnD);
+  flopr #(NUMWAYS-1) NewReplacementDelayReg(clk, reset, NewReplacement, NewReplacementD);
+
+  // Replacement Bits: Register file
+  // Needs to be resettable for simulation, but could omit reset for synthesis ***
+  always_ff @(posedge clk) 
+    if (reset) for (int set = 0; set < NUMLINES; set++) ReplacementBits[set] = '0;
+    else if (LRUWriteEnD) ReplacementBits[PAdrD[INDEXLEN+OFFSETLEN-1:OFFSETLEN]] = NewReplacementD;
   assign LineReplacementBits = ReplacementBits[RAdrD];
 
   genvar 		      index;
-  if(NUMWAYS == 2) begin : TwoWay
-    
+  if(NUMWAYS == 2) begin : PseudoLRU
     assign LRUEn[0] = 1'b0;
-
     assign NewReplacement[0] = WayHit[1];
-
     assign VictimWay[1] = ~LineReplacementBits[0];
     assign VictimWay[0] = LineReplacementBits[0];
-    
-  end else if (NUMWAYS == 4) begin : FourWay
-
-
-    // VictimWay is a function only of the current value of the LRU.
-    // binary encoding
-    //assign VictimWay[0] = LineReplacementBits[2] ? LineReplacementBits[1] : LineReplacementBits[0];
-    //assign VictimWay[1] = LineReplacementBits[2];
-
-    // 1 hot encoding
-    //| WayHit | LRU 2 | LRU 1 | LRU 0 |
-    //|--------+-------+-------+-------|
-    //|   0000 |     - | -     | -     |
-    //|   0001 |     1 | -     | 1     |
-    //|   0010 |     1 | -     | 0     |
-    //|   0100 |     0 | 1     | -     |
-    //|   1000 |     0 | 0     | -     |
+  end else if (NUMWAYS == 4) begin : PseudoLRU
+    // 1 hot encoding for VictimWay; LRU = LineReplacementBits
+    //| LRU 2 | LRU 1 | LRU 0 |  VictimWay
+    //+-------+-------+-------+-----------
+    //|     1 | -     | 1     | 0001
+    //|     1 | -     | 0     | 0010
+    //|     0 | 1     | -     | 0100
+    //|     0 | 0     | -     | 1000
 
     assign VictimWay[0] = ~LineReplacementBits[2] & ~LineReplacementBits[0];
     assign VictimWay[1] = ~LineReplacementBits[2] & LineReplacementBits[0];
@@ -117,33 +99,11 @@ module cachereplacementpolicy
     assign LRUMask[2] = WayHit[1] | WayHit[0];
     assign LRUMask[1] = WayHit[2];
     assign LRUMask[0] = WayHit[0];
-    
-/* -----\/----- EXCLUDED -----\/-----
 
-    // selects
-    assign LRUEn[2] = 1'b1;
-    assign LRUEn[1] = WayHit[3];      
-    assign LRUEn[0] = WayHit[3] | WayHit[2];
-
-    // mask
-    assign LRUMask[0] = WayHit[1];
-    assign LRUMask[1] = WayHit[3];      
-    assign LRUMask[2] = WayHit[3] | WayHit[2];
------/\----- EXCLUDED -----/\----- */
-
-    for(index = 0; index < NUMWAYS-1; index++)
-assign NewReplacement[index] = LRUEn[index] ? LRUMask[index] : LineReplacementBits[index];
-
-/* -----\/----- EXCLUDED -----\/-----
-    assign EncVicWay[1] = LineReplacementBits[2];
-    assign EncVicWay[0] = LineReplacementBits[2] ? LineReplacementBits[0] : LineReplacementBits[1];
-
-    onehotdecoder #(2) 
-    waydec(.bin(EncVicWay),
-      .decoded({VictimWay[0], VictimWay[1], VictimWay[2], VictimWay[3]}));
------/\----- EXCLUDED -----/\----- */
-
-  end else if (NUMWAYS == 8) begin : EightWay
+    mux2 #(1) LRUMuxes[NUMWAYS-2:0](LineReplacementBits, LRUMask, LRUEn, NewReplacement);
+  end 
+  /*  *** 8-way not yet working - look for a general way to write this for all NUMWAYS
+  else if (NUMWAYS == 8) begin : PseudoLRU
 
     // selects
     assign LRUEn[6] = 1'b1;
@@ -164,7 +124,7 @@ assign NewReplacement[index] = LRUEn[index] ? LRUMask[index] : LineReplacementBi
     assign LRUMask[0] = WayHit[0];
 
     for(index = 0; index < NUMWAYS-1; index++)
-assign NewReplacement[index] = LRUEn[index] ? LRUMask[index] : LineReplacementBits[index];
+      assign NewReplacement[index] = LRUEn[index] ? LRUMask[index] : LineReplacementBits[index];
 
     assign EncVicWay[2] = LineReplacementBits[6];
     assign EncVicWay[1] = LineReplacementBits[6] ? LineReplacementBits[5] : LineReplacementBits[2];
@@ -176,7 +136,7 @@ assign NewReplacement[index] = LRUEn[index] ? LRUMask[index] : LineReplacementBi
     waydec(.bin(EncVicWay),
       .decoded({VictimWay[0], VictimWay[1], VictimWay[2], VictimWay[3],
           VictimWay[4], VictimWay[5], VictimWay[6], VictimWay[7]}));
-  end
+  end */
 endmodule