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97 lines
3.6 KiB
Systemverilog
97 lines
3.6 KiB
Systemverilog
///////////////////////////////////////////
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// shifter.sv
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//
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// Written: David_Harris@hmc.edu 9 January 2021
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// Modified:
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//
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// Purpose: RISC-V 32/64 bit shifter
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//
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// A component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
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// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
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// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
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// is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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///////////////////////////////////////////
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`include "wally-config.vh"
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module shifter (
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input logic [`XLEN-1:0] a,
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input logic [5:0] amt,
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input logic right, arith, w64,
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output logic [`XLEN-1:0] y);
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// The best shifter architecture differs based on `XLEN.
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// for RV32, only 32-bit shifts are needed. These are
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// most efficiently implemented with a funnel shifter.
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// For RV64, 32 and 64-bit shifts are needed, with sign
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// extension.
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generate
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if (`XLEN==32) begin
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// funnel shifter (see CMOS VLSI Design 4e Section 11.8.1, note Table 11.11 shift types wrong)
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logic [62:0] z, zshift;
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logic [4:0] offset;
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// funnel input
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always_comb
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if (right)
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if (arith) z = {{31{a[31]}}, a};
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else z = {31'b0, a};
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else z = {a, 31'b0};
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// shift amount
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assign offset = right ? amt[4:0] : ~amt[4:0];
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// funnel operation
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assign zshift = z >> offset;
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assign y = zshift[31:0];
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end else begin // RV64
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// funnel shifter followed by masking
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// research idea: investigate shifter designs for mixed 32/64-bit shifts
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logic [126:0] z, zshift;
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logic [31:0] ylower, yupper;
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logic [5:0] offset, amt6;
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// funnel input
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always_comb
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if (w64) begin // 32-bit shifts
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if (right)
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if (arith) z = {64'b0, {31{a[31]}}, a[31:0]};
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else z = {95'b0, a[31:0]};
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else z = {32'b0, a[31:0], 63'b0};
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end else begin
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if (right)
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if (arith) z = {{63{a[63]}}, a};
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else z = {63'b0, a};
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else z = {a, 63'b0};
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end
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// shift amount
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assign amt6 = w64 ? {1'b0, amt[4:0]} : amt[5:0]; // 32 or 64-bit shift
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assign offset = right ? amt6 : ~amt6;
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// funnel operation
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assign zshift = z >> offset;
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assign ylower = zshift[31:0];
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// mask upper 32 bits for W-type 32-bit shifts
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// harris: is there a clever way to get zshift[31] earlier for arithmetic right shifts to speed up critical path?
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assign yupper = w64 ? {32{zshift[31]}} : zshift[63:32];
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assign y = {yupper, ylower};
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end
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endgenerate
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endmodule
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