mirror of
				https://github.com/openhwgroup/cvw
				synced 2025-02-11 06:05:49 +00:00 
			
		
		
		
	
		
			
				
	
	
		
			94 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
		
			Executable File
		
	
	
	
	
			
		
		
	
	
			94 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
		
			Executable File
		
	
	
	
	
| 
 | |
| # Search Paths
 | |
| set CURRENT_DIR  [exec pwd]
 | |
| set search_path [list "./" ]
 | |
| 
 | |
| set tech $::env(TECH)
 | |
| 
 | |
| set  timing_lib $::env(RISCV)/cad/lib
 | |
| lappend search_path $timing_lib
 | |
| 
 | |
| if {$tech == 130} {
 | |
|     set s8lib $timing_lib/sky130_osu_sc_t12/12T_ms/lib
 | |
|     lappend search_path $s8lib
 | |
| } elseif {$tech == 90} {
 | |
|     set s9lib $timing_lib/sky90/tech_files
 | |
|     lappend search_path $s9lib
 | |
| }
 | |
| 
 | |
| # Synthetic libraries
 | |
| set synthetic_library   [list dw_foundation.sldb]
 | |
| 
 | |
| # Set OKSTATE standard cell libraries
 | |
| set target_library [list]
 | |
| 
 | |
| #lappend target_library scc9gena_tt_1.2v_25C.db
 | |
| if {$tech == 130} {
 | |
|     lappend target_library sky130_osu_sc_12T_ms_TT_1P8_25C.ccs.db
 | |
| } elseif {$tech == 90} {
 | |
|     lappend target_library scc9gena_tt_1.2v_25C.db
 | |
| }
 | |
| 
 | |
| # Set Link Library
 | |
| set link_library "$target_library $synthetic_library"
 | |
| 
 | |
| # Set up DesignWare cache read and write directories to speed up compile.
 | |
| set cache_write  ~
 | |
| set cache_read   $cache_write
 | |
| 
 | |
| # Tell DC where to look for files
 | |
| lappend search_path ./scripts
 | |
| lappend search_path ./hdl
 | |
| lappend search_path ./mapped
 | |
| 
 | |
| # Set up User Information
 | |
| set company "Oklahoma State University"
 | |
| set user    "James E. Stine"
 | |
| 
 | |
| # Alias
 | |
| alias ra report_area
 | |
| alias rt report_timing
 | |
| alias rc {report_constraint -all_violators}
 | |
| 
 | |
| alias sf set_flatten
 | |
| alias ss set_structure
 | |
| alias rco report_compile_options
 | |
| alias cs compile -scan
 | |
| alias csi compile -scan -incr -map high
 | |
| 
 | |
| alias h history
 | |
| history keep 100
 | |
| alias all_gone {remove_design -designs}
 | |
|  
 | |
| alias page_on {set sh_enable_page_mode true}
 | |
| alias page_off {set sh_enable_page_mode false}
 | |
| 
 | |
| # specify directory for intermediate files from analyze
 | |
| define_design_lib DEFAULT -path ./analyzed
 | |
|  
 | |
| # suppress Driving cell warning
 | |
| suppress_message {UID-401}
 | |
| 
 | |
| ########### Source Useful Tcl Procedures ###########
 | |
| 
 | |
| foreach _file [glob -nocomplain ./tcl_procs/*.tcl] {
 | |
|   source $_file
 | |
| }
 | |
| 
 | |
| ############# Enable line editing in 2004.12 ###########
 | |
| 
 | |
| set sh_enable_line_editing true
 | |
| 
 | |
| ############# Setup the view utility ###########
 | |
| 
 | |
| proc view {args} {
 | |
|     redirect tmpfile1212 {uplevel $args}
 | |
|     # Without redirect, exec echos the PID of the new process to the screen
 | |
|     redirect /dev/null {exec ./tcl_procs/view.tk tmpfile1212 "$args" &}
 | |
| }
 | |
| 
 | |
| alias vrt {view report_timing -nosplit}
 | |
| alias vrtm {view report_timing -nosplit -delay min}
 | |
| alias vman {view man}
 | |
| 
 |