mirror of
https://github.com/openhwgroup/cvw
synced 2025-01-23 13:04:28 +00:00
85 lines
2.0 KiB
ArmAsm
85 lines
2.0 KiB
ArmAsm
// debug.S
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// David_Harris@hmc.edu 4 February 2023
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// Small code snippets for the purpose of debugging issues
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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.global rvtest_entry_point
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rvtest_entry_point:
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lui t0, 0x02 # turn on Floating point and XS
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csrs mstatus, t0
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la a6, begin_signature
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la a7, rvtest_data
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# openhwgroup/cvw Issue #55
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fld f4, 0(a7)
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fld f9, 8(a7)
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fsgnjx.s f12,f9,f4 # expected f 0xffffffff7fc00000, hdl has been giving fff8000000000000
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fsd f12, 0(a6)
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# openhwgroup/cvw Issue #56
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fld f4, 16(a7) # cfa695b1047553b1
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fld f14, 24(a7)
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fsgnjx.s f10,f4,f14 # expected f 0xffffffff7fc00000, hdl has been giving 0xcfa695b1047553b1
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fsd f19, 16(a6)
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# openhwgroup/cvw Issue #57
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fld f0, 32(a7)
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fld f15, 40(a7)
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fsgnjx.s f30,f0,f15 # expected f 0xfffffffffb3754ef, hdl has been giving 0xffffffff7b3754ef
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fsd f30, 24(a6)
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# openhwgroup/cvw Issue #58
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fld f14, 48(a7)
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fclass.s x2, f14 # expected 0x0000000000000200, hdl had been giving 0x0000000000000220
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sd x2, 32(a6)
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# fsgnjx.s, fclass.s, fsgnjn.s, fsgnj.s, fneg.s, fabs.s, fmv.s all treat inputs as dp rather than sp
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#openhwgroup/cvw Issue #65 #expected 0xffffffffffffffff, hdl had been giving 0x00000000ffffffff
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fld f17, 56(a7)
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fmv.x.s x30, f17
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sd x30, 40(a6)
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#########################
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# HTIF and signature
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#########################
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write_tohost:
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la t1, tohost
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li t0, 1 # 1 for success, 3 for failure
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sd t0, 0(t1) # send success code
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self_loop:
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j self_loop # wait
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.align 6
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.section .tohost
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tohost: # write to HTIF
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.dword 0
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fromhost:
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.dword 0
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.align 6
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.data
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rvtest_data:
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.dword 0x7ff0000000000001
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.dword 0x7ff8000000000000
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.dword 0xcfa695b1047553b1
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.dword 0xffffffff7fc00000
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.dword 0xfffffffffb3754ef
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.dword 0x7fefffffffffffff
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.dword 0x00000000ffffffff
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.EQU XLEN,64
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begin_signature:
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.fill 8*(XLEN/32),4,0xdeadbeef #
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end_signature:
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# Initialize stack with room for 512 bytes
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.bss
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.space 512
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topofstack:
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