cvw/fpga/constraints
2023-07-21 13:06:27 -05:00
..
artyddr3.ucf
constraints-ArtyA7.xdc Modified the LSU/IFU and caches to improve critical path. Arty A7 went from 15 to 17Mhz. I believe we can push all the way to 20+Mhz with relatively little effort. Along the way I'm fixing up the scripts build the linux images for the flash card. 2023-07-21 13:06:27 -05:00
constraints-vcu108.xdc
constraints-vcu118.xdc
debug2.xdc
debug4.xdc
marked_debug.txt
small-debug.xdc
test.file
vcu-small-debug.xdc