cvw/wally-pipelined/src
Ross Thompson f6c88666cf may have fixed the global branch history predictor.
The solution required a completed rewrite and understanding of how the GHR needs to be speculatively updated and repaired.
2021-05-31 16:11:12 -05:00
..
cache Reduced icache to 1 port memory. 2021-05-03 14:47:49 -05:00
dmem progress on bus and lrsc 2021-04-26 07:43:16 -04:00
ebu Clean up MMU code 2021-05-14 07:12:32 -04:00
fpu FMV.X.D imperas test passes 2021-05-24 14:44:30 -04:00
generic change flop in ahb controller to use normal flop module 2021-03-10 19:14:02 +00:00
hazard FSD and FLD imperas tests pass 2021-05-23 18:33:14 -04:00
ieu FMV.X.D imperas test passes 2021-05-24 14:44:30 -04:00
ifu may have fixed the global branch history predictor. 2021-05-31 16:11:12 -05:00
mmu Fix comment 2021-05-14 08:06:07 -04:00
muldiv Minor cosmetic elements on div.sv 2021-05-24 19:30:28 -05:00
privileged FMV.D.X imperas test passes 2021-05-20 22:17:59 -04:00
uncore plic implementation optimizations 2021-05-19 18:10:48 +00:00
wally FMV.X.D imperas test passes 2021-05-24 14:44:30 -04:00