mirror of
https://github.com/openhwgroup/cvw
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216 lines
9.8 KiB
Systemverilog
216 lines
9.8 KiB
Systemverilog
//////////////////////////////////////////
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// cvw.sv
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//
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// Written: David_Harris@hmc.edu 27 January 2022
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//
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// Purpose: package with shared CORE-V-Wally global parameters
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//
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// A component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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// Usiing global `define statements isn't ideal in a large SystemVerilog system because
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// of the risk of `define name conflicts across different subsystems.
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// Instead, CORE-V-Wally loads the appropriate configuration one time and places it in a package
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// that is referenced by all Wally modules but not by other subsystems.
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// Load configuration-specific information
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`include "wally-config.vh"
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// Place configuration in a package
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package cvw;
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parameter XLEN = `XLEN;
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parameter FPGA = `FPGA;
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parameter QEMU = `QEMU;
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parameter IEEE754 = `IEEE754;
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parameter MISA = `MISA;
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parameter ZICSR_SUPPORTED = `ZICSR_SUPPORTED;
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parameter ZIFENCEI_SUPPORTED = `ZIFENCEI_SUPPORTED;
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parameter COUNTERS = `COUNTERS;
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parameter ZICOUNTERS_SUPPORTED = `ZICOUNTERS_SUPPORTED;
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parameter ZFH_SUPPORTED = `ZFH_SUPPORTED;
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parameter BUS_SUPPORTED = `BUS_SUPPORTED;
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parameter DCACHE_SUPPORTED = `DCACHE_SUPPORTED;
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parameter ICACHE_SUPPORTED = `ICACHE_SUPPORTED;
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parameter VIRTMEM_SUPPORTED = `VIRTMEM_SUPPORTED;
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parameter VECTORED_INTERRUPTS_SUPPORTED = `VECTORED_INTERRUPTS_SUPPORTED;
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parameter BIGENDIAN_SUPPORTED = `BIGENDIAN_SUPPORTED;
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parameter ITLB_ENTRIES = `ITLB_ENTRIES;
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parameter DTLB_ENTRIES = `DTLB_ENTRIES;
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parameter DCACHE_NUMWAYS = `DCACHE_NUMWAYS;
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parameter DCACHE_WAYSIZEINBYTES = `DCACHE_WAYSIZEINBYTES;
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parameter DCACHE_LINELENINBITS = `DCACHE_LINELENINBITS;
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parameter ICACHE_NUMWAYS = `ICACHE_NUMWAYS;
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parameter ICACHE_WAYSIZEINBYTES = `ICACHE_WAYSIZEINBYTES;
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parameter ICACHE_LINELENINBITS = `ICACHE_LINELENINBITS;
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parameter IDIV_BITSPERCYCLE = `IDIV_BITSPERCYCLE;
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parameter IDIV_ON_FPU = `IDIV_ON_FPU;
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parameter PMP_ENTRIES = `PMP_ENTRIES;
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parameter RESET_VECTOR = `RESET_VECTOR;
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parameter WFI_TIMEOUT_BIT = `WFI_TIMEOUT_BIT;
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parameter DTIM_SUPPORTED = `DTIM_SUPPORTED;
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parameter DTIM_BASE = `DTIM_BASE;
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parameter DTIM_RANGE = `DTIM_RANGE;
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parameter IROM_SUPPORTED = `IROM_SUPPORTED;
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parameter IROM_BASE = `IROM_BASE;
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parameter IROM_RANGE = `IROM_RANGE;
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parameter BOOTROM_SUPPORTED = `BOOTROM_SUPPORTED;
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parameter BOOTROM_BASE = `BOOTROM_BASE;
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parameter BOOTROM_RANGE = `BOOTROM_RANGE;
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parameter UNCORE_RAM_SUPPORTED = `UNCORE_RAM_SUPPORTED;
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parameter UNCORE_RAM_BASE = `UNCORE_RAM_BASE;
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parameter UNCORE_RAM_RANGE = `UNCORE_RAM_RANGE;
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parameter EXT_MEM_SUPPORTED = `EXT_MEM_SUPPORTED;
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parameter EXT_MEM_BASE = `EXT_MEM_BASE;
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parameter EXT_MEM_RANGE = `EXT_MEM_RANGE;
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parameter CLINT_SUPPORTED = `CLINT_SUPPORTED;
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parameter CLINT_BASE = `CLINT_BASE;
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parameter CLINT_RANGE = `CLINT_RANGE;
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parameter GPIO_SUPPORTED = `GPIO_SUPPORTED;
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parameter GPIO_BASE = `GPIO_BASE;
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parameter GPIO_RANGE = `GPIO_RANGE;
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parameter UART_SUPPORTED = `UART_SUPPORTED;
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parameter UART_BASE = `UART_BASE;
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parameter UART_RANGE = `UART_RANGE;
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parameter PLIC_SUPPORTED = `PLIC_SUPPORTED;
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parameter PLIC_BASE = `PLIC_BASE;
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parameter PLIC_RANGE = `PLIC_RANGE;
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parameter SDC_SUPPORTED = `SDC_SUPPORTED;
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parameter SDC_BASE = `SDC_BASE;
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parameter SDC_RANGE = `SDC_RANGE;
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parameter AHBW = `AHBW;
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parameter GPIO_LOOPBACK_TEST = `GPIO_LOOPBACK_TEST;
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parameter UART_PRESCALE = `UART_PRESCALE;
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parameter PLIC_NUM_SRC = `PLIC_NUM_SRC;
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parameter PLIC_GPIO_ID = `PLIC_GPIO_ID;
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parameter PLIC_UART_ID = `PLIC_UART_ID;
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parameter BPRED_SUPPORTED = `BPRED_SUPPORTED;
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parameter BPRED_TYPE = `BPRED_TYPE;
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parameter BPRED_SIZE = `BPRED_SIZE;
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parameter HPTW_WRITES_SUPPORTED = `HPTW_WRITES_SUPPORTED;
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// parameter = `;
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// Shared parameters
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// constants defining different privilege modes
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// defined in Table 1.1 of the privileged spec
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parameter M_MODE = (2'b11);
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parameter S_MODE = (2'b01);
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parameter U_MODE = (2'b00);
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// Virtual Memory Constants
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parameter VPN_SEGMENT_BITS = (`XLEN == 32 ? 10 : 9);
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parameter VPN_BITS = (`XLEN==32 ? (2*`VPN_SEGMENT_BITS) : (4*`VPN_SEGMENT_BITS));
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parameter PPN_BITS = (`XLEN==32 ? 22 : 44);
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parameter PA_BITS = (`XLEN==32 ? 34 : 56);
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parameter SVMODE_BITS = (`XLEN==32 ? 1 : 4);
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parameter ASID_BASE = (`XLEN==32 ? 22 : 44);
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parameter ASID_BITS = (`XLEN==32 ? 9 : 16);
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// constants to check SATP_MODE against
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// defined in Table 4.3 of the privileged spec
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parameter NO_TRANSLATE = 0;
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parameter SV32 = 1;
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parameter SV39 = 8;
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parameter SV48 = 9;
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// macros to define supported modes
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parameter A_SUPPORTED = ((`MISA >> 0) % 2 == 1);
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parameter B_SUPPORTED = ((`ZBA_SUPPORTED | `ZBB_SUPPORTED | `ZBC_SUPPORTED | `ZBS_SUPPORTED)); // not based on MISA
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parameter C_SUPPORTED = ((`MISA >> 2) % 2 == 1);
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parameter D_SUPPORTED = ((`MISA >> 3) % 2 == 1);
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parameter E_SUPPORTED = ((`MISA >> 4) % 2 == 1);
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parameter F_SUPPORTED = ((`MISA >> 5) % 2 == 1);
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parameter I_SUPPORTED = ((`MISA >> 8) % 2 == 1);
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parameter M_SUPPORTED = ((`MISA >> 12) % 2 == 1);
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parameter Q_SUPPORTED = ((`MISA >> 16) % 2 == 1);
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parameter S_SUPPORTED = ((`MISA >> 18) % 2 == 1);
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parameter U_SUPPORTED = ((`MISA >> 20) % 2 == 1);
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// N-mode user-level interrupts are depricated per Andrew Waterman 1/13/21
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// logarithm of XLEN, used for number of index bits to select
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parameter LOG_XLEN = (`XLEN == 32 ? 5 : 6);
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// Number of 64 bit PMP Configuration Register entries (or pairs of 32 bit entries)
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parameter PMPCFG_ENTRIES = (`PMP_ENTRIES/8);
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// Floating point constants for Quad, Double, Single, and Half precisions
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parameter Q_LEN = 32'd128;
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parameter Q_NE = 32'd15;
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parameter Q_NF = 32'd112;
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parameter Q_BIAS = 32'd16383;
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parameter Q_FMT = 2'd3;
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parameter D_LEN = 32'd64;
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parameter D_NE = 32'd11;
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parameter D_NF = 32'd52;
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parameter D_BIAS = 32'd1023;
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parameter D_FMT = 2'd1;
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parameter S_LEN = 32'd32;
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parameter S_NE = 32'd8;
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parameter S_NF = 32'd23;
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parameter S_BIAS = 32'd127;
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parameter S_FMT = 2'd0;
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parameter H_LEN = 32'd16;
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parameter H_NE = 32'd5;
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parameter H_NF = 32'd10;
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parameter H_BIAS = 32'd15;
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parameter H_FMT = 2'd2;
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// Floating point length FLEN and number of exponent (NE) and fraction (NF) bits
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parameter FLEN = (`Q_SUPPORTED ? `Q_LEN : `D_SUPPORTED ? `D_LEN : `S_LEN);
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parameter NE = (`Q_SUPPORTED ? `Q_NE : `D_SUPPORTED ? `D_NE : `S_NE);
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parameter NF = (`Q_SUPPORTED ? `Q_NF : `D_SUPPORTED ? `D_NF : `S_NF);
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parameter FMT = (`Q_SUPPORTED ? 2'd3 : `D_SUPPORTED ? 2'd1 : 2'd0);
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parameter BIAS = (`Q_SUPPORTED ? `Q_BIAS : `D_SUPPORTED ? `D_BIAS : `S_BIAS);
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// Floating point constants needed for FPU paramerterization
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parameter FPSIZES = ((32)'(`Q_SUPPORTED)+(32)'(`D_SUPPORTED)+(32)'(`F_SUPPORTED)+(32)'(`ZFH_SUPPORTED));
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parameter FMTBITS = ((32)'(`FPSIZES>=3)+1);
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parameter LEN1 = ((`D_SUPPORTED & (`FLEN != `D_LEN)) ? `D_LEN : (`F_SUPPORTED & (`FLEN != `S_LEN)) ? `S_LEN : `H_LEN);
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parameter NE1 = ((`D_SUPPORTED & (`FLEN != `D_LEN)) ? `D_NE : (`F_SUPPORTED & (`FLEN != `S_LEN)) ? `S_NE : `H_NE);
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parameter NF1 = ((`D_SUPPORTED & (`FLEN != `D_LEN)) ? `D_NF : (`F_SUPPORTED & (`FLEN != `S_LEN)) ? `S_NF : `H_NF);
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parameter FMT1 = ((`D_SUPPORTED & (`FLEN != `D_LEN)) ? 2'd1 : (`F_SUPPORTED & (`FLEN != `S_LEN)) ? 2'd0 : 2'd2);
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parameter BIAS1 = ((`D_SUPPORTED & (`FLEN != `D_LEN)) ? `D_BIAS : (`F_SUPPORTED & (`FLEN != `S_LEN)) ? `S_BIAS : `H_BIAS);
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parameter LEN2 = ((`F_SUPPORTED & (`LEN1 != `S_LEN)) ? `S_LEN : `H_LEN);
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parameter NE2 = ((`F_SUPPORTED & (`LEN1 != `S_LEN)) ? `S_NE : `H_NE);
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parameter NF2 = ((`F_SUPPORTED & (`LEN1 != `S_LEN)) ? `S_NF : `H_NF);
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parameter FMT2 = ((`F_SUPPORTED & (`LEN1 != `S_LEN)) ? 2'd0 : 2'd2);
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parameter BIAS2 = ((`F_SUPPORTED & (`LEN1 != `S_LEN)) ? `S_BIAS : `H_BIAS);
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// largest length in IEU/FPU
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parameter CVTLEN = ((`NF<`XLEN) ? (`XLEN) : (`NF));
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parameter LLEN = ((`FLEN<`XLEN) ? (`XLEN) : (`FLEN));
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parameter LOGCVTLEN = $unsigned($clog2(`CVTLEN+1));
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parameter NORMSHIFTSZ = (((`CVTLEN+`NF+1)>(`DIVb + 1 +`NF+1) & (`CVTLEN+`NF+1)>(3*`NF+6)) ? (`CVTLEN+`NF+1) : ((`DIVb + 1 +`NF+1) > (3*`NF+6) ? (`DIVb + 1 +`NF+1) : (3*`NF+6)));
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parameter LOGNORMSHIFTSZ = ($clog2(`NORMSHIFTSZ));
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parameter CORRSHIFTSZ = (((`CVTLEN+`NF+1)>(`DIVb + 1 +`NF+1) & (`CVTLEN+`NF+1)>(3*`NF+6)) ? (`CVTLEN+`NF+1) : ((`DIVN+1+`NF) > (3*`NF+4) ? (`DIVN+1+`NF) : (3*`NF+4)));
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// division constants
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parameter DIVN = (((`NF<`XLEN) & `IDIV_ON_FPU) ? `XLEN : `NF+2); // standard length of input
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parameter LOGR = ($clog2(`RADIX)); // r = log(R)
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parameter RK = (`LOGR*`DIVCOPIES); // r*k used for intdiv preproc
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parameter LOGRK = ($clog2(`RK)); // log2(r*k)
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parameter FPDUR = ((`DIVN+1+(`LOGR*`DIVCOPIES))/(`LOGR*`DIVCOPIES)+(`RADIX/4));
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parameter DURLEN = ($clog2(`FPDUR+1));
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parameter DIVb = (`FPDUR*`LOGR*`DIVCOPIES-1); // canonical fdiv size (b)
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parameter DIVBLEN = ($clog2(`DIVb+1)-1);
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parameter DIVa = (`DIVb+1-`XLEN); // used for idiv on fpu
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endpackage
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