mirror of
https://github.com/openhwgroup/cvw
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132 lines
3.7 KiB
ArmAsm
132 lines
3.7 KiB
ArmAsm
##########################################
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# tlbASID.S
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#
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# Written: mmendozamanriquez@hmc.edu 4 April 2023
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# nlimpert@hmc.edu
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#
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# Purpose: Test coverage for IFU TLB camlines with mismatched ASID values. This file tests odd
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# numbered camlines. tlbASID2.S covers even numbered tlb camlines. These two files are identical.
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#
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# A component of the CORE-V-WALLY configurable RISC-V project.
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# https://github.com/openhwgroup/cvw
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#
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# Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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#
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# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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#
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# Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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# except in compliance with the License, or, at your option, the Apache License version 2.0. You
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# may obtain a copy of the License at
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#
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# https://solderpad.org/licenses/SHL-2.1/
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#
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# Unless required by applicable law or agreed to in writing, any work distributed under the
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# License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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# either express or implied. See the License for the specific language governing permissions
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# and limitations under the License.
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##############################################################################################
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# load code to initalize stack, handle interrupts, terminate
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#include "WALLY-init-lib.h"
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# run-elf.bash find this in project description
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main:
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# Page table root address at 0x80010000
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li t5, 0x9000000000080080 # try making asid = 0.
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csrw satp, t5
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# sfence.vma x0, x0
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# switch to supervisor mode
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li a0, 1
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ecall
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li t0, 0xC0000000
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li t2, 0 # i = 0
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li t5, 0 # j = 0 # now use as a counter for new asid loop
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li t3, 32 # Max amount of Loops = 32
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loop: bge t2, t3, finished # exit loop if i >= loops
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sfence.vma
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li t1, 0x00008067 #load in jalr
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sw t1, 0(t0)
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fence.I
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jalr t0
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li t5, 0x9001000000080080 # try making asid = 1
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csrw satp, t5
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jalr t0
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li t5, 0x9000000000080080 # try making asid = 0
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csrw satp, t5
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li t4, 0x1000
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add t0, t0, t4
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addi t2, t2, 1
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j loop
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finished:
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j done
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.data
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.align 19
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# level 3 Page table situated at 0x8008 0000, should point to 8008,1000
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pagetable:
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.8byte 0x200204C1
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.align 12 # level 2 page table, contains direction to a gigapage
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.8byte 0x0
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.8byte 0x0
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.8byte 0x200000CF # gigapage that starts at 8000 0000 goes to C000 0000
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.8byte 0x200208C1 # pointer to next page table entry at 8008 2000
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.align 12 # level 1 page table, points to level 0 page table
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.8byte 0x20020CC1
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.align 12 # level 0 page table, points to address C000 0000 # FOR NOW ALL OF THESE GO TO 8 instead of C cause they start with 2
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.8byte 0x200000CF # access xC000 0000
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.8byte 0x200004CF # access xC000 1000
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.8byte 0x200008CF # access xC000 2000
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.8byte 0x20000CCF # access xC000 3000
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.8byte 0x200010CF # access xC000 4000
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.8byte 0x200014CF
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.8byte 0x200018CF
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.8byte 0x20001CCF
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.8byte 0x200020CF # access xC000 8000
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.8byte 0x200024CF
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.8byte 0x200028CF
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.8byte 0x20002CCF
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.8byte 0x200030CF # access xC000 C000
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.8byte 0x200034CF
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.8byte 0x200038CF
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.8byte 0x20003CCF
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.8byte 0x200040CF # access xC001 0000
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.8byte 0x200044CF
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.8byte 0x200048CF
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.8byte 0x20004CCF
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.8byte 0x200050CF # access xC001 4000
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.8byte 0x200054CF
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.8byte 0x200058CF
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.8byte 0x20005CCF
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.8byte 0x200060CF # access xC001 8000
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.8byte 0x200064CF
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.8byte 0x200068CF
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.8byte 0x20006CCF
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.8byte 0x200070CF # access xC001 C000
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.8byte 0x200074CF
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.8byte 0x200078CF
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.8byte 0x20007CCF
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.8byte 0x200080CF # access xC002 0000
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.8byte 0x200084CF
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.8byte 0x200088CF
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.8byte 0x20008CCF
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