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f061a26411
cvw/fpga/constraints
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Ross Thompson f061a26411 Cleaned up fpga synthesis script.
2021-12-13 18:26:54 -06:00
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constraints.xdc Cleaned up fpga synthesis script. 2021-12-13 18:26:54 -06:00
debug2.xdc Modified FPGA to add additional signals to ILA. Created advanced trigger for ILA using vivado's tsm language. 2021-12-12 17:21:44 -06:00
debug.xdc Fixed more constraint issues in fpga. 2021-12-05 15:14:18 -06:00