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https://github.com/openhwgroup/cvw
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7bf2ee5418
Writing 0x00170000 and 0x17000000 to pmpaddr0 and pmpaddr2. Increased IFU coverage from 83.53% to 83.68% and LSU coverage from 93.29% to 93.45%.
106 lines
2.0 KiB
ArmAsm
106 lines
2.0 KiB
ArmAsm
// pmpcfg part 1
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// Kevin Wan, kewan@hmc.edu, 4/18/2023
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// Liam Chalk, lchalk@hmc.edu, 4/25/2023
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// locks each pmpXcfg bit field in order, from X = 15 to X = 0, with the A[1:0] field set to TOR.
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// See the next part in pmpcfg1.S
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#include "WALLY-init-lib.h"
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main:
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li t0, 0x90000000
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csrw pmpaddr0, t0
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li t0, 0x00000017
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csrw pmpcfg0, t0
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li t0, 0x90000000
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csrw pmpaddr2, t0
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li t0, 0x00000017
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csrw pmpcfg2, t0
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li t0, 0x90000000
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csrw pmpaddr0, t0
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li t0, 0x00001700
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csrw pmpcfg0, t0
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li t0, 0x90000000
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csrw pmpaddr0, t0
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li t0, 0x00001700
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csrw pmpcfg1, t0
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li t0, 0x90000000
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csrw pmpaddr0, t0
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li t0, 0x00001700
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csrw pmpcfg2, t0
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li t0, 0x90000000
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csrw pmpaddr0, t0
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li t0, 0x00001700
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csrw pmpcfg3, t0
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li t0, 0x90000000
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csrw pmpaddr1, t0
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li t0, 0x00001700
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csrw pmpcfg1, t0
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li t0, 0x90000000
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csrw pmpaddr2, t0
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li t0, 0x00001700
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csrw pmpcfg2, t0
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li t0, 0x90000000
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csrw pmpaddr3, t0
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li t0, 0x00001700
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csrw pmpcfg3, t0
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li t0, 0x90000000
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csrw pmpaddr0, t0
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li t0, 0x00170000
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csrw pmpcfg0, t0
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li t0, 0x90000000
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csrw pmpaddr2, t0
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li t0, 0x00170000
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csrw pmpcfg2, t0
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li t0, 0x90000000
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csrw pmpaddr0, t0
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li t0, 0x17000000
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csrw pmpcfg0, t0
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li t0, 0x90000000
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csrw pmpaddr2, t0
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li t0, 0x17000000
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csrw pmpcfg2, t0
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li t0, 0x8800000000000000
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csrw pmpcfg2, t0
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li t0, 0x88000000000000
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csrw pmpcfg2, t0
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li t0, 0x880000000000
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csrw pmpcfg2, t0
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li t0, 0x8800000000
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csrw pmpcfg2, t0
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li t0, 0x88000000
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csrw pmpcfg2, t0
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li t0, 0x880000
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csrw pmpcfg2, t0
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li t0, 0x8800
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csrw pmpcfg2, t0
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li t0, 0x88
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csrw pmpcfg2, t0
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li t0, 0x8800000000000000
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csrw pmpcfg0, t0
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li t0, 0x88000000000000
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csrw pmpcfg0, t0
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li t0, 0x880000000000
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csrw pmpcfg0, t0
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li t0, 0x8800000000
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csrw pmpcfg0, t0
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li t0, 0x88000000
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csrw pmpcfg0, t0
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li t0, 0x880000
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csrw pmpcfg0, t0
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li t0, 0x8800
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csrw pmpcfg0, t0
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j done |