cvw/fpga/constraints
2024-09-05 12:02:07 -07:00
..
artyddr3.ucf
constraints-ArtyA7.xdc Fixed Arty constraints and corrected typos. 2024-08-30 14:17:37 -05:00
constraints-vcu108.xdc Modified fpga config to support two fpga boards with different amount of memory. 2024-08-29 16:12:58 -07:00
constraints-vcu118.xdc
debug2.xdc
debug4.xdc
debug6.xdc
marked_debug_all.txt
marked_debug_rvvi.txt
marked_debug_small.txt
marked_debug_spi.txt Updates for arty A7 device tree. 2024-09-05 12:02:07 -07:00
marked_debug.txt Updates for arty A7 device tree. 2024-09-05 12:02:07 -07:00
small-debug-rvvi.xdc
small-debug-spi.xdc Updates for arty A7 device tree. 2024-09-05 12:02:07 -07:00
small-debug.xdc
vcu-small-debug.xdc