Ross Thompson a5d4e39e7d Added back the instret counter to ILA.		2022-04-17 18:44:07 -05:00
..
csr.sv	WFI should set EPC to PC+4	2022-04-14 17:05:22 +00:00
csrc.sv	Added back the instret counter to ILA.	2022-04-17 18:44:07 -05:00
csri.sv	Fixed bug with CSRRS/CSRRC for MIP/SIP	2022-04-03 20:18:25 +00:00
csrm.sv	Added wave config	2022-04-01 12:44:14 -05:00
csrs.sv	Removed depricated N-mode support and SI/EDELEG registers. rv64gc_wally64priv tests are failing, but seem to be failing before this change.	2022-02-15 19:20:41 +00:00
csrsr.sv	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-04-16 14:59:03 -05:00
csru.sv	Factored out InstrValidNotFlushedM from each csr*.sv to csr.sv	2022-01-20 16:39:54 -06:00
privdec.sv	First implementation of WFI timeout wait	2022-04-17 17:20:35 +00:00
privileged.sv	Experiments with prefix comparator; minor fixes in WFI and testbench warnings	2022-04-17 21:43:12 +00:00
trap.sv	First implementation of WFI timeout wait	2022-04-17 17:20:35 +00:00