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https://github.com/openhwgroup/cvw
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Created script to add mark_debug directive to source code based on a file which contains locations and signal which need them for the FPGA debugger. Files output to temporary directory.
28 lines
1.0 KiB
Bash
Executable File
28 lines
1.0 KiB
Bash
Executable File
#!/bin/bash
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fileC="../src/pipelined/ebu/busfsm.sv"
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signal="CurrState"
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type="busstatetype"
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#find ../src/pipelined/ -wholename $fileC | xargs sed "s/\(.*\(logic|statetype|busstatetype\).*$signal\)/(\* mark_debug = \"true\" \*)\1/g" | grep -i $signal
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#fileC="../src/pipelined/lsu/lsu.sv"
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#signal="IEUAdrM"
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#type="logic"
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echo "file = $fileC"
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echo "signal = $signal"
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echo $signal
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find ../src/pipelined/ -wholename $fileC | xargs sed "s/\(.*$type.*$signal\)/(\* mark_debug = \"true\" \*)\1/g" | grep -i $signal
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#exit 0
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while read line; do
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readarray -d ":" -t StrArray <<< "$line"
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file="../src/pipelined/${StrArray[0]}"
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#signal=`echo "${StrArray[1]}" | awk '{$1=$1};1'`
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signal=`echo "${StrArray[1]}" | awk '{$1=$1};1'`
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readarray -d " " -t SigArray <<< $signal
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sigType=`echo "${SigArray[0]}" | awk '{$1=$1};1'`
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sigName=`echo "${SigArray[1]}" | awk '{$1=$1};1'`
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find ../src/pipelined/ -wholename $file | xargs sed -i "s/\(.*${sigType}.*${sigName}\)/(\* mark_debug = \"true\" \*)\1/g"
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done < ../constraints/marked_debug.txt
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