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cvw
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wally-pipelined
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config
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rv64BP
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David Harris
91a13999a9
Added SUPPORTED to each peripheral in each config file
2021-06-17 21:36:32 -04:00
..
BTBPredictor.txt
Merge of main with the new icache and the branch predictor. I believe there is a bug in the icache with unaligned memory access. The second part of the access is incorrectly relying on the PCF being the address of the next two bytes of the instruction. However this is not always the case as the branch predictor can get the wrong target address. The icache needs to generate the +2 address internally.
2021-03-30 23:18:20 -05:00
twoBitPredictor.txt
Merge of main with the new icache and the branch predictor. I believe there is a bug in the icache with unaligned memory access. The second part of the access is incorrectly relying on the PCF being the address of the next two bytes of the instruction. However this is not always the case as the branch predictor can get the wrong target address. The icache needs to generate the +2 address internally.
2021-03-30 23:18:20 -05:00
wally-config.vh
Added SUPPORTED to each peripheral in each config file
2021-06-17 21:36:32 -04:00
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