cvw/fpga/constraints
2023-04-17 20:05:59 -05:00
..
artyddr3.ucf Added more support for Arty A7 board. 2023-04-10 16:01:17 -05:00
constraints-ArtyA7.xdc Improved constraints and set ddr3 voltage to correct 1.35V. This voltage is only for synthesis. However I'm concerned because the gui did not let me select 1.35V. 2023-04-17 20:05:59 -05:00
constraints-vcu108.xdc
constraints-vcu118.xdc
debug2.xdc Updated to help debut Jacob's crossbar woes. 2023-04-11 14:22:42 -05:00
debug4.xdc Fixed more bugs in the ila debug constraints. 2023-04-11 14:32:53 -05:00
marked_debug.txt Updated fpga constraints to remove critical warning. 2023-03-24 19:09:36 -05:00
small-debug.xdc Fixed timing constraint issue. 2023-04-17 19:53:43 -05:00
test.file