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The InvalidateCache signal in the D$ is for I$ only, which causes some coverage issues that need exclusion. Another manual exclusion is due to the fact that D$ writeback, flush, write_line, or flush_writeback states can't be cancelled by a flush, so those transistions are excluded. There is some other small stuff to review (logic simplification, or an exclusion pragma if removing the redundent logic would make it harder to understand the code, as is the case in the FlushAdrCntEn assign statement, in my opinion).
108 lines
8.0 KiB
Plaintext
108 lines
8.0 KiB
Plaintext
#///////////////////////////////////////////
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#// coverage-exclusions-rv64gc.do
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#//
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#// Written: David_Harris@hmc.edu 19 March 2023
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#//
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#// Purpose: Set of exclusions from coverage for rv64gc configuration
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#// For example, signals hardwired to 0 should not be checked for toggle coverage
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#//
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#// A component of the CORE-V-WALLY configurable RISC-V project.
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#//
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#// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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#//
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#// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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#//
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#// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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#// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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#// may obtain a copy of the License at
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#//
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#// https://solderpad.org/licenses/SHL-2.1/
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#//
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#// Unless required by applicable law or agreed to in writing, any work distributed under the
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#// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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#// either express or implied. See the License for the specific language governing permissions
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#// and limitations under the License.
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#////////////////////////////////////////////////////////////////////////////////////////////////
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# This file should be a last resort. It's preferable to put
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# // coverage off
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# statements inline with the code whenever possible.
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# a hack to describe coverage exclusions without hardcoding linenumbers:
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do GetLineNum.do
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# LZA (i<64) statement confuses coverage tool
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# This is ugly to exlcude the whole file - is there a better option? // coverage off isn't working
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coverage exclude -srcfile lzc.sv
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# FDIVSQRT has
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coverage exclude -scope /dut/core/fpu/fpu/fdivsqrt/fdivsqrtfsm -ftrans state DONE->BUSY
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### Exclude D$ states and logic for the I$ instance
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# This is cleaner than trying to set an I$-specific pragma in cachefsm.sv (which would exclude it for the D$ instance too)
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# Also exclude the write line to ready transition for the I$ since we can't get a flush during this operation.
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -fstate CurrState STATE_FLUSH STATE_FLUSH_WRITEBACK STATE_FLUSH_WRITEBACK STATE_WRITEBACK
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -ftrans CurrState STATE_WRITE_LINE->STATE_READY
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# exclude unused transitions from case statement. Unfortunately the whole branch needs to be excluded I think. Expression coverage should still work.
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -linerange [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag: icache state-case"] -item b 1
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# exclude branch/condition coverage: LineDirty if statement
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -linerange [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag: icache FETCHStatement"] -item bc 1
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# exclude the unreachable logic
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set start [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag-start: icache case"]
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set end [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag-end: icache case"]
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -linerange $start-$end
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -linerange [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag: icache WRITEBACKStatement"]
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# exclude Atomic Operation logic
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -linerange [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag: cache AnyMiss"] -item e 1 -fecexprrow 6
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -linerange [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag: icache storeAMO1"] -item e 1 -fecexprrow 2-4
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -linerange [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag: icache AnyUpdateHit"] -item e 1 -fecexprrow 2
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# cache write logic
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -linerange [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag: icache CacheW"] -item e 1 -fecexprrow 4
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# output signal logic
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -linerange [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag: icache StallStates"] -item e 1 -fecexprrow 8 12 14
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set start [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag-start: icache flushdirtycontrols"]
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set end [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag-end: icache flushdirtycontrols"]
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -linerange $start-$end
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -linerange [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag: icache CacheBusW"]
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -linerange [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag: icache SelAdrCauses"] -item e 1 -fecexprrow 4 10
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -linerange [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag: icache CacheBusRCauses"] -item e 1 -fecexprrow 1-2 12
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# cache.sv AdrSelMux and CacheBusAdrMux, excluding unhit Flush branch
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/AdrSelMux -linerange [GetLineNum ../src/generic/mux.sv "exclusion-tag: mux3"] -item b 1
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/CacheBusAdrMux -linerange [GetLineNum ../src/generic/mux.sv "exclusion-tag: mux3"] -item b 1 3
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# CacheWay Dirty logic. -scope does not accept wildcards.
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set numcacheways 4
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for {set i 0} {$i < $numcacheways} {incr i} {
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/CacheWays[$i] -linerange [GetLineNum ../src/cache/cacheway.sv "exclusion-tag: icache SetDirtyWay"] -item e 1
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/CacheWays[$i] -linerange [GetLineNum ../src/cache/cacheway.sv "exclusion-tag: icache SelectedWiteWordEn"] -item e 1 -fecexprrow 4 6
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# below: flushD can't go high during an icache write b/c of pipeline stall
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coverage exclude -scope /dut/core/ifu/bus/icache/icache/CacheWays[$i] -linerange [GetLineNum ../src/cache/cacheway.sv "exclusion-tag: icache SetValidEN"] -item e 1 -fecexprrow 4
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}
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## D$ Exclusions.
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# InvalidateCache is I$ only:
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coverage exclude -scope /dut/core/lsu/bus/dcache/dcache/cachefsm -linerange [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag: dcache InvalidateCheck"] -item b 2
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coverage exclude -scope /dut/core/lsu/bus/dcache/dcache/cachefsm -linerange [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag: dcache InvalidateCheck"] -item s 1
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coverage exclude -scope /dut/core/lsu/bus/dcache/dcache/cachefsm -linerange [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag: dcache CacheEn"] -item e 1 -fecexprrow 12
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coverage exclude -scope /dut/core/lsu/bus/dcache/dcache/cachefsm -linerange [GetLineNum ../src/cache/cachefsm.sv "exclusion-tag: cache AnyMiss"] -item e 1 -fecexprrow 4
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set numcacheways 4
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for {set i 0} {$i < $numcacheways} {incr i} {
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coverage exclude -scope /dut/core/lsu/bus/dcache/dcache/CacheWays[$i] -linerange [GetLineNum ../src/cache/cacheway.sv "exclusion-tag: dcache invalidateway"] -item be 1 -fecexprrow 4
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}
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# D$ writeback, flush, write_line, or flush_writeback states can't be cancelled by a flush
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coverage exclude -scope /dut/core/lsu/bus/dcache/dcache/cachefsm -ftrans CurrState STATE_WRITEBACK->STATE_READY STATE_FLUSH->STATE_READY STATE_WRITE_LINE->STATE_READY STATE_FLUSH_WRITEBACK->STATE_READY
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# Excluding peripherals as sources of instructions for the ifu
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coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker/adrdecs/clintdec
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coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker/adrdecs/gpiodec
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coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker/adrdecs/uartdec
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coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker/adrdecs/plicdec
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coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker/adrdecs/bootromdec
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coverage exclude -scope /dut/core/ifu/immu/immu/pmachecker/adrdecs/uncoreramdec
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#Excluding the bootrom, uncoreran, and clint as sources for the lsu
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coverage exclude -scope /dut/core/lsu/dmmu/dmmu/pmachecker/adrdecs/bootromdec
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#set line [GetLineNum ../src/mmu/adrdec.sv "& SizeValid"]
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#coverage exclude -scope /dut/core/lsu/dmmu/dmmu/pmachecker/adrdecs/clintdec -linerange $line-$line -item e 1 -fecexprrow 5
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