DTowersM dd34f25ffd changed DCACHE_LINELENINBITS and ICACHE_LINELENINBITS to 512, had to modigy the wfi test to increase timee before interupt to mantain compatability		2022-06-10 00:37:53 +00:00
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config	changed DCACHE_LINELENINBITS and ICACHE_LINELENINBITS to 512, had to modigy the wfi test to increase timee before interupt to mantain compatability	2022-06-10 00:37:53 +00:00
misc	Renamed wally-pipelined to pipelined	2022-01-04 19:47:41 +00:00
regression	fma synth warnings and errors removed	2022-06-06 16:06:04 +00:00
src	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-06-08 16:28:18 +00:00
srt	Added integer division in srt, parametrized everything to work with integers and floating points, parametrized testbench.	2022-06-04 00:14:10 +00:00
testbench	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-06-07 23:58:58 +00:00