mirror of
https://github.com/openhwgroup/cvw
synced 2025-01-23 13:04:28 +00:00
169 lines
4.0 KiB
ArmAsm
169 lines
4.0 KiB
ArmAsm
///////////////////////////////////////////
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// hptwAccessFault.S
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//
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// Written: Rose Thompson rose@rosethompson.net
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//
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// Purpose: Force the HPTW to walk a page table with invalid addresses so that the pma checker
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// generate access faults.
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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// https://github.com/openhwgroup/cvw
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//
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// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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// load code to initalize stack, handle interrupts, terminate
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#include "WALLY-init-lib.h"
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# run-elf.bash find this in project description
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main:
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# Page table root address at 0x80010000
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li t5, 0x9000000000080010
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csrw satp, t5
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# sfence.vma x0, x0
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# switch to supervisor mode
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li a0, 1
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ecall
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li t5, 0
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li t2, 0x1000
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li t0, 0x8000001000
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lw t1, 0(t0) # this load is a valid virtual address, but the page table will access an invalid address so it should cause a load access fault
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li t1, 0x00008067 # this store is a valid virtual address, but the page table will access an invalid address so it should cause a store access fault
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add t0, t0, t2
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sw t1, 0(t0)
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j jumppoint
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jumppoint:
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.align 6 # aligns to cache line size
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sw t1, 0(t0)
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sw t1, 4(t0)
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sw t1, 8(t0)
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sw t1, 12(t0)
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sw t1, 16(t0)
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sw t1, 20(t0)
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sw t1, 24(t0)
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sw t1, 28(t0)
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sw t1, 32(t0)
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sw t1, 36(t0)
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sw t1, 40(t0)
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sw t1, 44(t0)
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sw t1, 48(t0)
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sw t1, 52(t0) # this one causes a concurrent I$ miss with HPTW access exception (store access exception)
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sw t1, 56(t0)
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lw t3, 0(t0)
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lw t3, 4(t0)
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lw t3, 8(t0)
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lw t3, 12(t0)
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lw t3, 16(t0)
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fence.I
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finished:
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j done
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.data
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.align 16
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# Page table situated at 0x80010000
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pagetable:
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.8byte 0x200044C1
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.8byte 0x300044C1 # point to invalid region of physical memory
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.align 12
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.8byte 0x00000040200048C1
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.8byte 0x00000000200048C1
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.8byte 0x00000000200048C1
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.align 12
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.8byte 0x0000000020004CC1
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.align 12
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#80000000
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.8byte 0x200000CF
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.8byte 0x200004CF
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.8byte 0x200008CF
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.8byte 0x20000CCF
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.8byte 0x200010CF
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.8byte 0x200014CF
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.8byte 0x200018CF
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.8byte 0x20001CCF
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.8byte 0x200020CF
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.8byte 0x200024CF
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.8byte 0x200028CF
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.8byte 0x20002CCF
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.8byte 0x200030CF
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.8byte 0x200034CF
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.8byte 0x200038CF
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.8byte 0x20003CCF
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.8byte 0x200040CF
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.8byte 0x200044CF
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.8byte 0x200048CF
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.8byte 0x20004CCF
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.8byte 0x200050CF
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.8byte 0x200054CF
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.8byte 0x200058CF
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.8byte 0x20005CCF
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.8byte 0x200060CF
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.8byte 0x200064CF
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.8byte 0x200068CF
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.8byte 0x20006CCF
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.8byte 0x200070CF
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.8byte 0x200074CF
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.8byte 0x200078CF
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.8byte 0x20007CCF
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.8byte 0x200080CF
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.8byte 0x200084CF
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.8byte 0x200088CF
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.8byte 0x20008CCF
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.8byte 0x200090CF
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.8byte 0x200094CF
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.8byte 0x200098CF
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.8byte 0x20009CCF
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.8byte 0x2000A0CF
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.8byte 0x2000A4CF
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.8byte 0x2000A8CF
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.8byte 0x2000ACCF
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.8byte 0x2000B0CF
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.8byte 0x2000B4CF
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.8byte 0x2000B8CF
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.8byte 0x2000BCCF
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.8byte 0x2000C0CF
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.8byte 0x2000C4CF
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.8byte 0x2000C8CF
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.8byte 0x2000CCCF
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.8byte 0x2000D0CF
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.8byte 0x2000D4CF
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