mirror of
https://github.com/openhwgroup/cvw
synced 2025-01-23 13:04:28 +00:00
133 lines
5.5 KiB
Plaintext
133 lines
5.5 KiB
Plaintext
lsu/lsu.sv: logic IEUAdrM
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lsu/lsu.sv: logic WriteDataM
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lsu/lsu.sv: logic LSUHADDR
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lsu/lsu.sv: logic HRDATA
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lsu/lsu.sv: logic LSUHWDATA
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lsu/lsu.sv: logic LSUHREADY
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lsu/lsu.sv: logic LSUHWRITE
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lsu/lsu.sv: logic LSUHSIZE
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lsu/lsu.sv: logic LSUHBURST
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lsu/lsu.sv: logic LSUHTRANS
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lsu/lsu.sv: logic LSUHWSTRB
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lsu/lsu.sv: logic IHAdrM
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ieu/regfile.sv: logic rf
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ieu/datapath.sv: logic RegWriteW
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hazard/hazard.sv: logic BPPredWrongE
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hazard/hazard.sv: logic LoadStallD
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hazard/hazard.sv: logic FCvtIntStallD
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hazard/hazard.sv: logic DivBusyE
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hazard/hazard.sv: logic EcallFaultM
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hazard/hazard.sv: logic WFIStallM
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hazard/hazard.sv: logic StallF
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hazard/hazard.sv: logic FlushD
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cache/cachefsm.sv: statetype CurrState
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wally/wallypipelinedcore.sv: logic TrapM
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wally/wallypipelinedcore.sv: logic SrcAM
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wally/wallypipelinedcore.sv: logic InstrM
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wally/wallypipelinedcore.sv: logic PCM
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wally/wallypipelinedcore.sv: logic MemRWM
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wally/wallypipelinedcore.sv: logic InstrValidM
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wally/wallypipelinedcore.sv: logic WriteDataM
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wally/wallypipelinedcore.sv: logic IEUAdrM
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wally/wallypipelinedcore.sv: logic HRDATA
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ifu/spill.sv: statetype CurrState
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ifu/ifu.sv: logic IFUStallF
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ifu/ifu.sv: logic IFUHADDR
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ifu/ifu.sv: logic HRDATA
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ifu/ifu.sv: logic IFUHREADY
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ifu/ifu.sv: logic IFUHWRITE
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ifu/ifu.sv: logic IFUHSIZE
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ifu/ifu.sv: logic IFUHBURST
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ifu/ifu.sv: logic IFUHTRANS
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ifu/ifu.sv: logic PCF
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ifu/ifu.sv: logic PCNextF
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ifu/ifu.sv: logic PCPF
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ifu/ifu.sv: logic PostSpillInstrRawF
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mmu/hptw.sv: logic ITLBWriteF
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mmu/hptw.sv: statetype WalkerState
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mmu/hptw.sv: logic ValidPTE
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privileged/csrs.sv: logic CSRSReadValM
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privileged/csrs.sv: logic SEPC_REGW
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privileged/csrs.sv: logic MIP_REGW
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privileged/csrs.sv: logic SSCRATCH_REGW
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privileged/csrs.sv: logic SCAUSE_REGW
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privileged/csr.sv: logic CSRReadValM
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privileged/csr.sv: logic CSRSrcM
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privileged/csr.sv: logic CSRWriteValM
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privileged/csr.sv: logic MSTATUS_REGW
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privileged/trap.sv: logic InstrMisalignedFaultM
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privileged/trap.sv: logic BreakpointFaultM
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privileged/trap.sv: logic LoadAccessFaultM
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privileged/trap.sv: logic LoadPageFaultM
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privileged/trap.sv: logic mretM
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privileged/trap.sv: logic MIP_REGW
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privileged/trap.sv: logic PendingIntsM
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privileged/privileged.sv: logic CSRReadM
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privileged/privileged.sv: logic InterruptM
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privileged/csrc.sv: logic HPMCOUNTER_REGW
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privileged/csri.sv: logic MExtInt
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privileged/csri.sv: logic MIP_REGW_writeabl
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privileged/csrm.sv: logic MIP_REGW
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privileged/csrm.sv: logic MEPC_REGW
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privileged/csrm.sv: logic MEDELEG_REGW
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privileged/csrm.sv: logic MIDELEG_REGW
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privileged/csrm.sv: logic MSCRATCH_REGW
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privileged/csrm.sv: logic MCAUSE_REGW
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uncore/uart_apb.sv: logic SIN
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uncore/uart_apb.sv: logic SOUT
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uncore/uart_apb.sv: logic OUT1b
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uncore/uartPC16550D.sv: logic RBR
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uncore/uartPC16550D.sv: logic FCR
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uncore/uartPC16550D.sv: logic IER
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uncore/uartPC16550D.sv: logic MCR
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uncore/uartPC16550D.sv: logic baudpulse
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uncore/uartPC16550D.sv: statetype rxstate
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uncore/uartPC16550D.sv: logic rxfifo
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uncore/uartPC16550D.sv: logic txfifo
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uncore/uartPC16550D.sv: logic rxfifohead
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uncore/uartPC16550D.sv: logic rxfifoentries
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uncore/uartPC16550D.sv: logic RXBR
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uncore/uartPC16550D.sv: logic rxtimeoutcnt
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uncore/uartPC16550D.sv: logic rxparityerr
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uncore/uartPC16550D.sv: logic rxdataready
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uncore/uartPC16550D.sv: logic rxfifoempty
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uncore/uartPC16550D.sv: logic rxdata
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uncore/uartPC16550D.sv: logic RXerrbit
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uncore/uartPC16550D.sv: logic rxfullbitunwrapped
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uncore/uartPC16550D.sv: logic txdata
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uncore/uartPC16550D.sv: logic txnextbit
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uncore/uartPC16550D.sv: logic txfifoempty
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uncore/uartPC16550D.sv: logic fifoenabled
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uncore/uartPC16550D.sv: logic RXerr
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uncore/uartPC16550D.sv: logic THRE
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uncore/uartPC16550D.sv: logic rxdataavailintr
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uncore/uartPC16550D.sv: logic intrID
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uncore/uncore.sv: logic HSELEXTSDCD
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uncore/plic_apb.sv: logic MExtInt
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uncore/plic_apb.sv: logic Din
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uncore/plic_apb.sv: logic requests
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uncore/plic_apb.sv: logic intPriority
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uncore/plic_apb.sv: logic intInProgress
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uncore/plic_apb.sv: logic intThreshold
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uncore/plic_apb.sv: logic intEn
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uncore/plic_apb.sv: logic intClaim
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uncore/plic_apb.sv: logic irqMatrix
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uncore/plic_apb.sv: logic priorities_with_irqs
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uncore/plic_apb.sv: logic max_priority_with_irqs
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uncore/plic_apb.sv: logic irqs_at_max_priority
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uncore/plic_apb.sv: logic threshMask
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uncore/clint_apb.sv: logic MTIME
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uncore/clint_apb.sv: logic MTIMECMP
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ebu/ebu.sv: logic HCLK
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ebu/ebu.sv: logic HREADY
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ebu/ebu.sv: logic HRESP
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ebu/ebu.sv: logic HADDR
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ebu/ebu.sv: logic HWRITE
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ebu/ebu.sv: logic HSIZE
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ebu/ebu.sv: logic HBURST
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ebu/ebu.sv: logic HPROT
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ebu/ebu.sv: logic HTRANS
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ebu/ebu.sv: logic HMASTLOC
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ebu/buscachefsm.sv: busstatetype CurrState
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ebu/busfsm.sv: busstatetype CurrState
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