cvw/src/cache
2023-07-21 13:06:27 -05:00
..
cache.sv Modified the LSU/IFU and caches to improve critical path. Arty A7 went from 15 to 17Mhz. I believe we can push all the way to 20+Mhz with relatively little effort. Along the way I'm fixing up the scripts build the linux images for the flash card. 2023-07-21 13:06:27 -05:00
cachefsm.sv Fixed bug with performance counters not tracking the correct number of requested icache and dcache memory operations. 2023-07-14 16:31:44 -05:00
cacheLRU.sv Merge branch 'testbench-params2' 2023-06-15 15:31:13 -05:00
cacheway.sv Created separate temporary testbench for xcelium. 2023-07-11 15:07:33 -05:00
subcachelineread.sv Merge branch 'testbench-params2' 2023-06-15 15:31:13 -05:00