Rose Thompson 7693c5d4e2 Updates to fpga top level.		2023-12-15 15:32:05 -06:00
..
axi_sdc_controller.v	Changed SDC outputs to ensure they are aligned to the falling edge of the divided down clock rather than the processor clock.	2023-10-10 17:46:12 -05:00
boot.mem	Updated ROM to preload bootloader from file and infer a block ram when building for FPGA.	2023-11-18 19:15:39 -06:00
fpgaTop.v	Added help option to the flash-sd script.	2023-08-22 13:37:33 -05:00
fpgaTopArtyA7.sv	Updates to fpga top level.	2023-12-15 15:32:05 -06:00
wallypipelinedsocwrapper.sv	Merge branch 'boot' into mergeBoot	2023-07-21 17:43:45 -05:00