Ross Thompson 11e5aad38a Moved subcachelineread inside the cache. There is some ugliness to still resolve.		2022-03-11 12:44:04 -06:00
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config	switch linux-testbench infrastructure over to new linux testvectors at /opt/riscv	2022-03-01 03:11:43 +00:00
fpu-testfloat/FMA/tbgen	Replaced || and && with | and &	2022-01-31 01:07:35 +00:00
misc	Renamed wally-pipelined to pipelined	2022-01-04 19:47:41 +00:00
regression	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-03-04 00:06:27 +00:00
src	Moved subcachelineread inside the cache. There is some ugliness to still resolve.	2022-03-11 12:44:04 -06:00
srt	Renamed unpacking unit to unpack and renamed WriteDataW to ResultW in IEU datapath	2022-02-28 20:50:51 +00:00
testbench	fix up PLIC and UART checkpointing	2022-03-07 23:48:47 -08:00