Ross Thompson cbb5e4440f Improved FPGA makefile and fixed timing constraints in clock converter.		2021-12-03 10:05:13 -06:00
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constraints	Constraints for fpga are still wrong.	2021-12-02 14:23:21 -06:00
generator	Improved FPGA makefile and fixed timing constraints in clock converter.	2021-12-03 10:05:13 -06:00
sim	Fpga simualtion files.	2021-10-11 10:24:40 -05:00
src	Got fpga synthesis running from scripts.	2021-12-01 16:59:04 -06:00