mirror of
https://github.com/openhwgroup/cvw
synced 2025-02-11 06:05:49 +00:00
45 lines
816 B
Makefile
45 lines
816 B
Makefile
# David_Harris@hmc.edu 2023
|
|
# Top-level Makefile for CORE-V-Wally
|
|
# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
|
|
|
|
SIM = ${WALLY}/sim
|
|
|
|
all:
|
|
make riscof
|
|
make testfloat
|
|
# make verify
|
|
make coverage
|
|
# make benchmarks
|
|
|
|
# riscof builds the riscv-arch-test and wally-riscv-arch-test suites
|
|
riscof:
|
|
make -C sim
|
|
|
|
testfloat:
|
|
cd ${WALLY}/addins/SoftFloat-3e/build/Linux-x86_64-GCC; make
|
|
cd ${WALLY}/addins/TestFloat-3e/build/Linux-x86_64-GCC; make
|
|
cd ${WALLY}/tests/fp; ./create_all_vectors.sh
|
|
|
|
verify:
|
|
cd ${SIM}; ./regression-wally
|
|
cd ${SIM}/sim; ./sim-testfloat-batch all
|
|
make imperasdv
|
|
|
|
benchmarks:
|
|
make coremark
|
|
make embench
|
|
|
|
coremark:
|
|
cd ${WALLY}/benchmarks/coremark; make; make run
|
|
|
|
embench:
|
|
cd ${WALLY}/benchmarks/embench; make; make run
|
|
|
|
coverage:
|
|
make -C tests/coverage
|
|
|
|
|
|
clean:
|
|
make clean -C sim
|
|
|