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19 lines
348 B
Systemverilog
Executable File
19 lines
348 B
Systemverilog
Executable File
module shifter_right(input logic signed [63:0] a,
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input logic [ 5:0] shamt,
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output logic signed [63:0] y);
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y = a >> shamt;
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endmodule // shifter_right
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module shifter_left(input logic signed [63:0] a,
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input logic [ 5:0] shamt,
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output logic signed [63:0] y);
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y = a << shamt;
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endmodule // shifter_right
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