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cvw
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bc132c3e20
cvw
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pipelined
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David Harris
bc132c3e20
sram1p1rw extra bits are complaining on Tera and VLSI; roll back to two always blocks to fix on Tera
2022-05-03 03:50:41 -07:00
..
config
set WFI timeout to after 16 bits of counting for all configs
2022-04-28 18:14:08 +00:00
misc
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
regression
fixed incorrect configs in regression
2022-04-25 19:28:47 +00:00
src
sram1p1rw extra bits are complaining on Tera and VLSI; roll back to two always blocks to fix on Tera
2022-05-03 03:50:41 -07:00
srt
Renamed unpacking unit to unpack and renamed WriteDataW to ResultW in IEU datapath
2022-02-28 20:50:51 +00:00
testbench
added missing SIE test
2022-04-29 19:54:29 +00:00
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