Kevin Kim b61d881c1b added BRegWrite, BW64, BALUOp signals to bctrl and controller ... -TODO: Main decode in bmuctrl must assert these 3 signals		2023-02-28 11:54:10 -08:00
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bitreverse.sv	moved files into bmu folder	2023-02-08 13:57:09 +00:00
bmuctrl.sv	added BRegWrite, BW64, BALUOp signals to bctrl and controller	2023-02-28 11:54:10 -08:00
byte.sv	controlleres and zbb handle byte instructions	2023-02-18 21:06:55 -08:00
clmul.sv	added comments to zbc units	2023-02-15 17:42:32 -08:00
cnt.sv	Fixed lint errors on zero and pop count. All of regression passes	2023-02-22 20:25:51 -08:00
ext.sv	added logic to handle sign/zero extend instructions	2023-02-18 20:32:40 -08:00
popcnt.sv	lint fixes	2023-02-11 21:13:10 -08:00
zbb.sv	B DONE (for now)	2023-02-18 22:12:55 -08:00
zbc.sv	added comments to zbc units	2023-02-15 17:42:32 -08:00
zbs.sv	zbb, zbs, cnt lint fixes	2023-02-11 20:41:52 -08:00