cvw/sim
David Harris c9ca5108b1 Merge pull request #312 from ross144/main
Fixed typo in coremark makefile.
2023-06-06 05:44:22 -07:00
..
slack-notifier
wave-dos
bpred-sim.py
buildrootBugFinder.py Renamed wally-piplined.do to wally.do 2023-02-04 04:38:41 -08:00
coverage-exclusions-rv64gc.do
fpga-wave.do
GetLineNum.do
imperas.ic
lint-wally Oups forgot to include updates to the lint script itself. 2023-05-31 11:00:38 -05:00
linux-wave.do Modified the imperas linux scripts so they run without reporting hundreds of gigabytes of data. 2023-04-26 17:29:57 -05:00
make-tests.sh
Makefile
makefile-memfile
regression-wally
run-imperas-linux.sh
run-imperasdv-tests.bash Renamed wally-piplined.do to wally.do 2023-02-04 04:38:41 -08:00
rv64gc_CacheSim.py
sim-buildroot
sim-buildroot-batch
sim-imperas
sim-testfloat Renamed regression to sim 2023-02-02 14:48:23 -08:00
sim-testfloat-batch
sim-wally
sim-wally-batch Renamed wally-piplined.do to wally.do 2023-02-04 04:38:41 -08:00
test
testfloat.do
verilate Verilate start 2023-05-22 10:30:39 -07:00
wally-batch.do Updated a large number of the source files to use parameters rather than `defines. Based on Lim's work. So far there is no simulation slow down. 2023-05-24 14:05:44 -05:00
wally-imperas-cov.do Updated do files for parameterization. 2023-05-30 15:38:03 -05:00
wally-imperas-no-idv.do
wally-imperas.do
wally-linux-imperas.do
wally.do
wave-all.do
wave-fpu.do
wave.do