cvw/tests/debug/simple/openocd.cfg
2024-06-09 12:05:39 -05:00

38 lines
1.0 KiB
INI

# OpenOCD config file for Core V Wally
# can find example material in /usr/share/openocd/scripts/
adapter driver ftdi
# when multiple adapters with the same vid_pid are connected (ex: arty-a7 and usb-jtag)
# need to specify which usb port to drive
# find numerical path using command "lsusb -t" (<bus>-<port>)
adapter usb location 1-10.2
ftdi vid_pid 0x0403 0x6010
ftdi channel 0
#TODO: figure out which of these bits need to be set
# data MSB..LSB direction (1:out) MSB..LSB
# 0000'0000'0011'0000 0000'0000'0011'1011
ftdi layout_init 0x0030 0x003b
#ftdi layout_init 0x0008 0x001b
transport select jtag
adapter speed 1000
#ftdi tdo_sample_edge falling
set _CHIPNAME cvw
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1002A005
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME riscv -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x8000000 -work-area-size 0x4000 -work-area-backup 0
# enable memory access error reports
riscv set_enable_virt2phys off
riscv set_enable_virtual off
init
halt