cvw/fpga/generator
2023-08-25 17:04:50 -05:00
..
debug Setup to run with both the vcu108 and vcu118 boards. Set the parameters in the Makefile. 2022-10-24 15:38:39 -05:00
bootrom.txt
insert_debug_comment.sh Updated fpga constraints. 2023-01-20 20:16:33 -06:00
Makefile
probe
wally.tcl
wave_config.wcfg
xlnx_ahblite_axi_bridge.tcl
xlnx_axi_clock_converter.tcl
xlnx_axi_crossbar.tcl
xlnx_axi_dwidth_conv_32to64.tcl
xlnx_axi_dwidth_conv_64to32.tcl
xlnx_axi_dwidth_converter.tcl
xlnx_axi_prtcl_conv.tcl
xlnx_ddr3-artya7-mig.prj
xlnx_ddr3-ArtyA7.tcl Finally fixed the ddr3 mig script to work correclty. 2023-04-14 11:41:51 -05:00
xlnx_ddr4-vcu108.tcl Setup to run with both the vcu108 and vcu118 boards. Set the parameters in the Makefile. 2022-10-24 15:38:39 -05:00
xlnx_ddr4-vcu118.tcl Pushed vcu118 to 71MHz. 2023-08-25 17:04:50 -05:00
xlnx_ddr4.tcl Setup to run with both the vcu108 and vcu118 boards. Set the parameters in the Makefile. 2022-10-24 15:38:39 -05:00
xlnx_mmcm.tcl
xlnx_proc_sys_reset.tcl