Ross Thompson 92accfb1a6 Updated uart settings and fpga wave config.		2022-10-18 15:05:33 -05:00
..
config	Gated sticky bit in fdiv with SpecialCase	2022-09-20 20:05:00 -07:00
misc	Renamed wally-pipelined to pipelined	2022-01-04 19:47:41 +00:00
regression	Merge branch 'main' of github.com:davidharrishmc/riscv-wally	2022-10-04 17:33:54 +00:00
src	Updated uart settings and fpga wave config.	2022-10-18 15:05:33 -05:00
testbench	fixed endianness mstatush problem, passes make, not regression	2022-10-04 17:37:39 +00:00