mirror of
https://github.com/openhwgroup/cvw
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90 lines
2.4 KiB
Systemverilog
90 lines
2.4 KiB
Systemverilog
module add3comp2(a, b, c, carry, sum);
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/////////////////////////////////////////////////////////////////////////////
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//look into diffrent implementations of the compressors?
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parameter BITS = 4;
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input logic [BITS-1:0] a;
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input logic [BITS-1:0] b;
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input logic [BITS-1:0] c;
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output logic [BITS-1:0] carry;
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output logic [BITS-1:0] sum;
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genvar i;
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generate
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for(i= 0; i<BITS; i=i+1) begin
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sng3comp2 add0(a[i], b[i], c[i], carry[i], sum[i]);
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end
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endgenerate
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endmodule
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module add4comp2(a, b, c, d, carry, sum);
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/////////////////////////////////////////////////////////////////////////////
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parameter BITS = 4;
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input logic [BITS-1:0] a;
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input logic [BITS-1:0] b;
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input logic [BITS-1:0] c;
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input logic [BITS-1:0] d;
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output logic [BITS:0] carry;
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output logic [BITS-1:0] sum;
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logic [BITS-1:0] cout;
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logic carryTmp;
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genvar i;
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sng4comp2 add0(a[0], b[0], c[0], d[0], 1'b0, cout[0], carry[0], sum[0]);
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generate
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for(i= 1; i<BITS-1; i=i+1) begin
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sng4comp2 add1(a[i], b[i], c[i], d[i], cout[i-1], cout[i], carry[i], sum[i]);
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end
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endgenerate
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sng4comp2 add2(a[BITS-1], b[BITS-1], c[BITS-1], d[BITS-1], cout[BITS-2], cout[BITS-1], carryTmp, sum[BITS-1]);
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assign carry[BITS-1] = carryTmp & cout[BITS-1];
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assign carry[BITS] = carryTmp ^ cout[BITS-1];
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endmodule
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module sng3comp2(a, b, c, carry, sum);
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/////////////////////////////////////////////////////////////////////////////
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//look into diffrent implementations of the compressors?
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input logic a;
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input logic b;
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input logic c;
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output logic carry;
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output logic sum;
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logic axorb;
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assign axorb = a ^ b;
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assign sum = axorb ^ c;
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assign carry = axorb ? c : a;
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endmodule
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module sng4comp2(a, b, c, d, cin, cout, carry, sum);
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/////////////////////////////////////////////////////////////////////////////
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//look into pass gate 4:2 counters?
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input logic a;
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input logic b;
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input logic c;
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input logic d;
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input logic cin;
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output logic cout;
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output logic carry;
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output logic sum;
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logic TmpSum;
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sng3comp2 add1(.carry(cout), .sum(TmpSum),.*);
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sng3comp2 add2(.a(TmpSum), .b(d), .c(cin), .*);
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endmodule |