mirror of
https://github.com/openhwgroup/cvw
synced 2025-02-11 06:05:49 +00:00
Once combined with some simulation verilog this will display the current function in modelsim. |
||
---|---|---|
.. | ||
bin | ||
config | ||
regression | ||
src | ||
testbench | ||
testgen | ||
lint-wally |