cvw/tests/coverage
2023-04-20 14:50:06 -07:00
..
csrwrites.S Fixed csrwrites.S to agree with ImperasDV. Now coverage tests pass iter-elf 2023-04-07 21:11:01 -07:00
dcache1.py Cover CacheWay edge case: CacheDataMem we=1 while ce=0. 2023-04-19 01:34:01 -07:00
dcache1.S Cover CacheWay edge case: CacheDataMem we=1 while ce=0. 2023-04-19 01:34:01 -07:00
dcache2.S add D$ test case to trigger a FlushStage while SetDirtyWay=1 2023-04-19 01:34:01 -07:00
ebu.S Start of EBU coverage tests 2023-03-24 08:12:02 -07:00
fpu.S Added multiple tests to increase FPU coverage 2023-04-14 14:41:05 -05:00
ieu.S Fixed WALLY-init-lib to return correctly even from traps from compressed instructions 2023-04-07 20:24:33 -07:00
ifu.S Fixed WALLY-init-lib to return correctly even from traps from compressed instructions 2023-04-07 20:24:33 -07:00
ifuCamlineWrite.S Increase of TLB coverage in IFU 2023-04-17 18:35:03 -07:00
lsu.S add back K. Box and M. Cook Lsu test 2023-04-13 17:50:18 -07:00
Makefile Started adding fpu fctrl tests 2023-03-28 21:13:25 -07:00
pmp.S Create new pmp tests 2023-04-09 16:29:57 -07:00
pmpcfg1.S Add test cases for pmpcfg.S 2023-04-18 23:06:52 -07:00
pmpcfg2.S Add test cases for pmpcfg.S 2023-04-18 23:06:52 -07:00
pmpcfg.S Add pmpcfg test cases increasing IFU coverage 2023-04-19 11:58:22 -07:00
priv.S Completely covers all PMPCFG_ARRAY_REGW cases 2023-04-18 21:50:48 -07:00
tlbASID.S Commiting changes to add coverage to ASID, Global, Megapage size checks. 2023-04-20 14:38:13 -07:00
tlbGLB.S Commiting changes to add coverage to ASID, Global, Megapage size checks. 2023-04-20 14:38:13 -07:00
tlbKP.S update tests.vh, add tlbKP to load all lines of tlb 2023-04-13 15:13:55 -07:00
tlbM3.S Add in a test that makes match 3 = 0 for all tlb lines 2023-04-20 14:50:06 -07:00
tlbMP.S Commiting changes to add coverage to ASID, Global, Megapage size checks. 2023-04-20 14:38:13 -07:00
vm64check.S Added vm64check tests to cover IMMU vm64 2023-04-07 21:14:52 -07:00
WALLY-init-lib.h Fixed exception handling to handle ecalls properly 2023-04-13 09:23:32 -07:00