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Configurable RISC-V Processor
1,279 Commits 5 Branches 2 Tags 53 MiB
SystemVerilog 33.7%
Python 19.2%
Assembly 17.5%
Tcl 16.2%
C 5.8%
Other 7.4%
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bbracker 847edccbd7 incremental linux config de-bloating
2021-07-15 21:33:52 -04:00
riscv-coremark Commented out remaining ehitoa function declaration/calls and related char buff instances. Also commented out extra libraries not currently in use 2021-07-14 04:46:11 -04:00
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wally-pipelined incremental linux config de-bloating 2021-07-15 21:33:52 -04:00
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riscv-wally

Configurable RISC-V Processor