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107 lines
4.3 KiB
Systemverilog
107 lines
4.3 KiB
Systemverilog
///////////////////////////////////////////
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// localbpbasic
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//
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// Written: Ross Thompson
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// Email: ross1728@gmail.com
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// Created: 16 March 2021
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//
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// Purpose: Local history branch predictor. Basic implementation without any repair and flop memories.
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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//
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// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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`include "wally-config.vh"
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module localbpbasic #(parameter m = 6, // 2^m = number of local history branches
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parameter k = 10) ( // number of past branches stored
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input logic clk,
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input logic reset,
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input logic StallF, StallD, StallE, StallM, StallW,
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input logic FlushD, FlushE, FlushM, FlushW,
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output logic [1:0] BPDirPredF,
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output logic BPDirPredWrongE,
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// update
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input logic [`XLEN-1:0] PCNextF, PCM,
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input logic BranchE, BranchM, PCSrcE
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);
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logic [k-1:0] IndexNextF, IndexM;
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logic [1:0] BPDirPredD, BPDirPredE;
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logic [1:0] NewBPDirPredE, NewBPDirPredM;
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logic [k-1:0] LHRF, LHRD, LHRE, LHRM, LHR;
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logic [k-1:0] LHRNextW;
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logic PCSrcM;
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logic [2**m-1:0][k-1:0] LHRArray;
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logic [m-1:0] IndexLHRNextF, IndexLHRM;
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logic UpdateM;
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assign IndexNextF = LHR;
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assign IndexM = LHRM;
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ram2p1r1wbe #(2**k, 2) PHT(.clk(clk),
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.ce1(~StallF), .ce2(~StallW & ~FlushW),
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.ra1(IndexNextF),
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.rd1(BPDirPredF),
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.wa2(IndexM),
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.wd2(NewBPDirPredM),
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.we2(BranchM),
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.bwe2(1'b1));
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flopenrc #(2) PredictionRegD(clk, reset, FlushD, ~StallD, BPDirPredF, BPDirPredD);
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flopenrc #(2) PredictionRegE(clk, reset, FlushE, ~StallE, BPDirPredD, BPDirPredE);
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satCounter2 BPDirUpdateE(.BrDir(PCSrcE), .OldState(BPDirPredE), .NewState(NewBPDirPredE));
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flopenrc #(2) NewPredictionRegM(clk, reset, FlushM, ~StallM, NewBPDirPredE, NewBPDirPredM);
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assign BPDirPredWrongE = PCSrcE != BPDirPredE[1] & BranchE;
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// This is the main difference between global and local history basic implementations. In global,
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// the ghr wraps back into itself directly without
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// being pipelined. I.E. GHR is not read in F and then pipelined to M where it is updated. Instead
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// GHR is both read and update in M. GHR is still pipelined so that the PHT is updated with the correct
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// GHR. Local history in contrast must pipeline the specific history register read during F and then update
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// that same one in M. This implementation does not forward if a branch matches in the D, E, or M stages.
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assign LHRNextW = BranchM ? {PCSrcM, LHRM[k-1:1]} : LHRM;
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// this is local history
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genvar index;
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assign UpdateM = BranchM & ~StallW & ~FlushW;
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assign IndexLHRM = {PCM[m+1] ^ PCM[1], PCM[m:2]};
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for (index = 0; index < 2**m; index = index +1) begin:localhist
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flopenr #(k) LocalHistoryRegister(.clk, .reset, .en(UpdateM & (index == IndexLHRM)),
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.d(LHRNextW), .q(LHRArray[index]));
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end
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assign IndexLHRNextF = {PCNextF[m+1] ^ PCNextF[1], PCNextF[m:2]};
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assign LHR = LHRArray[IndexLHRNextF];
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// this is global history
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//flopenr #(k) LHRReg(clk, reset, ~StallM & ~FlushM & BranchM, LHRNextW, LHR);
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flopenrc #(1) PCSrcMReg(clk, reset, FlushM, ~StallM, PCSrcE, PCSrcM);
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flopenrc #(k) LHRFReg(clk, reset, FlushD, ~StallF, LHR, LHRF);
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flopenrc #(k) LHRDReg(clk, reset, FlushD, ~StallD, LHRF, LHRD);
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flopenrc #(k) LHREReg(clk, reset, FlushE, ~StallE, LHRD, LHRE);
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flopenrc #(k) LHRMReg(clk, reset, FlushM, ~StallM, LHRE, LHRM);
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endmodule
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