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89 lines
3.8 KiB
Systemverilog
89 lines
3.8 KiB
Systemverilog
///////////////////////////////////////////
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// shifter.sv
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//
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// Written: David_Harris@hmc.edu, Sarah.Harris@unlv.edu, Kevin Kim <kekim@hmc.edu>
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// Created: 9 January 2021
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// Modified: 6 February 2023
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//
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// Purpose: RISC-V 32/64 bit shifter
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//
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// Documentation: RISC-V System on Chip Design Chapter 4 (Figure 4.5, Table 4.3)
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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//
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// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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`include "wally-config.vh"
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module shifter (
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input logic [`XLEN-1:0] A, // shift Source
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input logic [`LOG_XLEN-1:0] Amt, // Shift amount
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input logic Right, Rotate, W64, SubArith, // Shift right, rotate, W64-type operation, arithmetic shift
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output logic [`XLEN-1:0] Y); // Shifted result
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logic [2*`XLEN-2:0] Z, ZShift; // Input to funnel shifter, shifted amount before truncated to 32 or 64 bits
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logic [`LOG_XLEN-1:0] TruncAmt, Offset; // Shift amount adjusted for RV64, right-shift amount
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logic Sign; // Sign bit for sign extension
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assign Sign = A[`XLEN-1] & SubArith; // sign bit for sign extension
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if (`XLEN==32) begin // rv32
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if (`ZBB_SUPPORTED) begin: rotfunnel32 //rv32 shifter with rotates
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always_comb // funnel mux
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case({Right, Rotate})
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2'b00: Z = {A[31:0], 31'b0};
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2'b01: Z = {A[31:0], A[31:1]};
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2'b10: Z = {{31{Sign}}, A[31:0]};
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2'b11: Z = {A[30:0], A[31:0]};
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endcase
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end else begin: norotfunnel32 //rv32 shifter without rotates
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always_comb // funnel mux
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if (Right) Z = {{31{Sign}}, A[31:0]};
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else Z = {A[31:0], 31'b0};
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end
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assign TruncAmt = Amt; // shift amount
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end else begin // rv64
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logic [`XLEN-1:0] A64;
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mux3 #(64) extendmux({{32{1'b0}}, A[31:0]}, {{32{A[31]}}, A[31:0]}, A, {~W64, SubArith}, A64); // bottom 32 bits are always A[31:0], so effectively a 32-bit upper mux
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if (`ZBB_SUPPORTED) begin: rotfunnel64 // rv64 shifter with rotates
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// shifter rotate source select mux
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logic [`XLEN-1:0] RotA; // rotate source
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mux2 #(`XLEN) rotmux(A, {A[31:0], A[31:0]}, W64, RotA); // W64 rotatons
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always_comb // funnel mux
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case ({Right, Rotate})
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2'b00: Z = {A64[63:0],{63'b0}};
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2'b01: Z = {RotA[63:0], RotA[63:1]};
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2'b10: Z = {{63{Sign}}, A64[63:0]};
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2'b11: Z = {RotA[62:0], RotA[63:0]};
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endcase
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end else begin: norotfunnel64 // rv64 shifter without rotates
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always_comb // funnel mux
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if (Right) Z = {{63{Sign}}, A64[63:0]};
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else Z = {A64[63:0], {63'b0}};
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end
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assign TruncAmt = W64 ? {1'b0, Amt[4:0]} : Amt; // 32- or 64-bit shift
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end
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// Opposite offset for right shifts
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assign Offset = Right ? TruncAmt : ~TruncAmt;
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// Funnel operation
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assign ZShift = Z >> Offset;
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assign Y = ZShift[`XLEN-1:0];
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endmodule
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