cvw/wally-pipelined/config
Ross Thompson d901cfc848 Merge branch 'icache_bp_bug' into tests
Not sure this merge is right.
2021-04-06 21:46:40 -05:00
..
busybear Merge of main with the new icache and the branch predictor. I believe there is a bug in the icache with unaligned memory access. The second part of the access is incorrectly relying on the PCF being the address of the next two bytes of the instruction. However this is not always the case as the branch predictor can get the wrong target address. The icache needs to generate the +2 address internally. 2021-03-30 23:18:20 -05:00
coremark Merge of main with the new icache and the branch predictor. I believe there is a bug in the icache with unaligned memory access. The second part of the access is incorrectly relying on the PCF being the address of the next two bytes of the instruction. However this is not always the case as the branch predictor can get the wrong target address. The icache needs to generate the +2 address internally. 2021-03-30 23:18:20 -05:00
coremark_bare Merge of main with the new icache and the branch predictor. I believe there is a bug in the icache with unaligned memory access. The second part of the access is incorrectly relying on the PCF being the address of the next two bytes of the instruction. However this is not always the case as the branch predictor can get the wrong target address. The icache needs to generate the +2 address internally. 2021-03-30 23:18:20 -05:00
rv32ic Merge branch 'icache_bp_bug' into tests 2021-04-06 21:46:40 -05:00
rv64BP Merge branch 'icache_bp_bug' into tests 2021-04-06 21:46:40 -05:00
rv64ic Merge branch 'icache_bp_bug' into tests 2021-04-06 21:46:40 -05:00
rv64icfd Merge branch 'icache_bp_bug' into tests 2021-04-06 21:46:40 -05:00