David Harris 31a2346c37 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main		2021-10-27 10:37:46 -07:00
..
bin	Added testbench-arch for riscv-arch-test suite	2021-09-08 15:59:40 -04:00
config	removed reduntant definitions for FPU in MISA.	2021-10-22 15:18:25 -05:00
fpu-testfloat/FMA/tbgen	FMA matches diagram and lint warnings fixed	2021-10-09 17:38:10 -07:00
linux-testgen	bugfix argument passing to GDB script; remove outdated GDB script	2021-10-26 12:43:42 -07:00
misc	Clean up MMU code	2021-05-14 07:12:32 -04:00
ppa	Config file for ppa experiments	2021-03-25 10:23:21 -05:00
regression	Changes for floating point sims	2021-10-27 10:37:35 -07:00
src	Replaced async reset flip flops with sync reset flip flops in cache and bpread.	2021-10-27 09:57:11 -05:00
srt	moved coemark and testsBP to tests	2021-10-20 09:10:06 -07:00
testbench	Changes for floating point sims	2021-10-27 10:37:35 -07:00
testgen	mcause test fixes and s-mode interrupt bugfix	2021-06-16 17:37:08 -04:00