James E. Stine 66643eb78e Update sim-testfloat to fix errors due to bad config element. I am not sure of the reasoning, but the specific path to the testvector was not getting inserted in Questa. This modification also adds features to test individualized tests (.e.g, binary16 only) -- documentation is added in the FPbuild.txt file		2023-06-20 17:26:54 -05:00
..
common	Added assertions for ZICNTR and ZIHPM	2023-06-16 09:26:02 -07:00
fp
sdc
testbench_imperas.sv	add changes for latest IDV file layout	2023-06-16 16:43:53 +01:00
testbench-fp.sv	Update sim-testfloat to fix errors due to bad config element. I am not sure of the reasoning, but the specific path to the testvector was not getting inserted in Questa. This modification also adds features to test individualized tests (.e.g, binary16 only) -- documentation is added in the FPbuild.txt file	2023-06-20 17:26:54 -05:00
testbench-linux-imperas.sv	add changes for latest IDV file layout	2023-06-16 16:43:53 +01:00
testbench-linux.sv	Have the linux testbench working in the mean time. Before the consolidation.	2023-06-15 16:18:37 -05:00
testbench.sv	Modified the testbench to generate the required files for embench scripts.	2023-06-16 12:27:22 -05:00
tests-fp.vh	Update testbench-fp to run TestFloat for all FP operations	2023-04-11 22:16:20 -05:00
tests.vh	Fixed embench to run all tests, even ones not in 1.0	2023-06-17 20:38:51 -07:00
wallywrapper.sv	Actually removed old `define configuration file for rv64gc. There were a lot of dangling problems.	2023-06-15 14:05:44 -05:00