cvw/pipelined/src/ieu
2023-02-02 18:54:33 +00:00
..
alu.sv added beginning of a ZBS instruction module to the ALU. Control signals still needed 2023-02-01 21:31:25 -08:00
clmul.sv continued clmul unit 2023-02-02 18:54:33 +00:00
comparator.sv renamed comparator module 2023-01-20 10:13:47 -08:00
controller.sv Renamed DCACHE to DCACHE_SUPPORTED and ICACHE to ICACHE_SUPPORTED 2023-01-28 18:52:00 -08:00
datapath.sv Removed unused BMU, added CVW configuration 2023-01-27 15:47:15 -08:00
extend.sv IEU comment cleanup 2023-01-17 10:51:44 -08:00
forward.sv IEU comment cleanup 2023-01-17 10:51:44 -08:00
ieu.sv Removed unused BMU, added CVW configuration 2023-01-27 15:47:15 -08:00
regfile.sv Removed mark_debug from all source code. 2023-01-20 18:47:36 -06:00
shifter.sv IEU cleanup 2023-01-17 06:02:26 -08:00
zbs.sv added beginning of a ZBS instruction module to the ALU. Control signals still needed 2023-02-01 21:31:25 -08:00