cvw/wally-pipelined/src
2021-07-04 13:49:38 -05:00
..
cache added page table walker fault exit for icache. 2021-07-01 17:59:55 -05:00
ebu removed mmustall and finished port annotations on ptw and lsuArb. 2021-07-03 16:06:09 -05:00
fpu FPU update - missing files 2021-07-02 12:53:05 -04:00
generic Flow updated for 90nm 2021-07-01 13:32:42 -05:00
hazard Merge branch 'main' into bigbadbranch 2021-07-02 11:52:26 -05:00
ieu Merge branch 'main' into bigbadbranch 2021-07-02 11:52:26 -05:00
ifu Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2021-07-02 13:56:49 -05:00
lsu relocated lsuarb and pagetable walker inside the lsu. Does not pass busybear or buildroot, but passes rv32ic and rv64ic. 2021-07-04 13:49:38 -05:00
mmu removed mmustall and finished port annotations on ptw and lsuArb. 2021-07-03 16:06:09 -05:00
muldiv Revert "fixed forwarding" 2021-06-24 17:39:37 -04:00
privileged Optimized PMP checker logic and added support for configurable number of PMP registers 2021-07-02 11:04:13 -04:00
uncore Light cleanup of signals, style. Changed several signals to account for new Phys Addr sizes as opposed to HADDR. 2021-06-24 20:01:11 -04:00
wally relocated lsuarb and pagetable walker inside the lsu. Does not pass busybear or buildroot, but passes rv32ic and rv64ic. 2021-07-04 13:49:38 -05:00