bbracker 5911029d2b make testbench ignore MIP because of timing imprecision and because QEMU maybe isn't getting MTIP right anyways		2021-07-19 17:11:42 -04:00
..
bin
config	Added FLEN, NE, NF to config and started using these in FMA1	2021-07-18 17:28:25 -04:00
linux-testgen	change memread testvectors to not left-shift bytes and half-words	2021-07-18 21:49:53 -04:00
misc
ppa
regression	make testbench check the same CSRs that QEMU logs; change CLINT to reset MTIMECMP to -1 so that we don't instantly get a timer interrupt upon reset	2021-07-19 15:13:03 -04:00
src	whoops MTIMECMP is always 64 bits	2021-07-19 15:40:53 -04:00
testbench	make testbench ignore MIP because of timing imprecision and because QEMU maybe isn't getting MTIP right anyways	2021-07-19 17:11:42 -04:00
testgen
lint-wally