Noah Boorstin 3f2820646d More testbench setup work ... - Copy bare-bones testbench from E85 - have testbench instantiate a wallypipelinedhart so we can simulate memory/peripherals easier - Create .gitignore for vsim files - Make PC reset a macro, change to 0x1000 to conform to the bootloader I don't know a good way to put the linux register trace file we're generating on git, since its both nontrivial to make and way to big to keep in a git repo for now it lives in /mnt/scratch/riscv_testbench/		2021-01-21 17:55:05 -05:00
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bin	cleanup	2021-01-18 00:42:40 -05:00
src	More testbench setup work	2021-01-21 17:55:05 -05:00
testgen	testgen-ADD-SUB working and testbench simualtes with new vectors for rv32 and rv64	2021-01-20 01:04:28 -05:00
lint-wally	Sped up exe2memfile.pl	2021-01-17 18:45:19 -05:00
sim-wally	Initial Checkin	2021-01-14 23:37:51 -05:00
sim-wally-batch	Initial Checkin	2021-01-14 23:37:51 -05:00
wally-busybear.do	More testbench setup work	2021-01-21 17:55:05 -05:00
wally-pipelined-batch.do	Initial Checkin	2021-01-14 23:37:51 -05:00
wally-pipelined.do	Changed to . notation for instantiation, cleaned up dmem	2021-01-18 20:16:53 -05:00
wally.old	Initial Checkin	2021-01-14 23:37:51 -05:00