Ross Thompson 4d14c714a7 Fixed forwarding around the 2 bit predictor.		2021-03-04 13:01:41 -06:00
..
dmem	Rename ifu/dmem/ebu signals to match uarch diagram	2021-02-02 15:09:24 -05:00
ebu	Rename ifu/dmem/ebu signals to match uarch diagram	2021-02-02 15:09:24 -05:00
fpu/build_temp	Parallel FSR's and F CTRL logic	2021-02-04 02:25:55 -06:00
generic	Reorganized src hierarchically	2021-01-30 11:50:37 -05:00
hazard	Added FlushF to hazard unit.	2021-02-19 16:36:51 -06:00
ieu	Shreya and I found a bug with the exeuction of JAL and JALR instructions. The link was only set in the writeback stage. Once the branch predictor started correctly predicting JAL(R)s the ALU and forwarding logic need to have the PCLinkE at the execution stage in case an instruction in the next two clocks need the data.	2021-02-26 20:12:27 -06:00
ifu	Fixed forwarding around the 2 bit predictor.	2021-03-04 13:01:41 -06:00
privileged	Minor tweaks	2021-02-02 19:44:37 -05:00
uncore	bus rw bugfix and peripherals testing	2021-02-12 00:02:45 -05:00
wally	Shreya and I found a bug with the exeuction of JAL and JALR instructions. The link was only set in the writeback stage. Once the branch predictor started correctly predicting JAL(R)s the ALU and forwarding logic need to have the PCLinkE at the execution stage in case an instruction in the next two clocks need the data.	2021-02-26 20:12:27 -06:00