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csrwrites.S
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Fixed WALLY-trap test case to use menvcfg
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2023-06-09 15:24:26 -07:00 |
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dcache1.py
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Cover CacheWay edge case: CacheDataMem we=1 while ce=0.
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2023-04-19 01:34:01 -07:00 |
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dcache1.S
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Cover CacheWay edge case: CacheDataMem we=1 while ce=0.
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2023-04-19 01:34:01 -07:00 |
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dcache2.S
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add D$ test case to trigger a FlushStage while SetDirtyWay=1
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2023-04-19 01:34:01 -07:00 |
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ebu.S
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Start of EBU coverage tests
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2023-03-24 08:12:02 -07:00 |
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fpu.S
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Improve test coverage on ieu fw.
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2023-06-16 16:09:48 -07:00 |
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ieu.S
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Improved tlb and controller coverage; fixed exclusions on broken lines
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2023-08-31 00:27:47 -07:00 |
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ifu.S
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Fixed WALLY-init-lib to return correctly even from traps from compressed instructions
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2023-04-07 20:24:33 -07:00 |
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ifuCamlineWrite.S
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Increase of TLB coverage in IFU
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2023-04-17 18:35:03 -07:00 |
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lsu.S
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add back K. Box and M. Cook Lsu test
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2023-04-13 17:50:18 -07:00 |
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Makefile
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Improved tlb and controller coverage; fixed exclusions on broken lines
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2023-08-31 00:27:47 -07:00 |
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pmp.S
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Create new pmp tests
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2023-04-09 16:29:57 -07:00 |
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pmpadrdecs.S
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Pmpadrdecs test cases changing AdrMode to 2 or 3
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2023-04-27 12:23:35 -07:00 |
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pmpcfg1.S
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Add test cases for pmpcfg.S
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2023-04-18 23:06:52 -07:00 |
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pmpcfg2.S
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Add test cases for pmpcfg.S
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2023-04-18 23:06:52 -07:00 |
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pmpcfg.S
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pmpaddr0 and pmpaddr2 test cases
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2023-04-25 15:37:04 -07:00 |
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pmppriority.S
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added tests for pmppriority module
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2023-04-27 16:12:43 -07:00 |
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priv.S
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Merge pull request #394 from harshinisrinath1001/main
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2023-08-24 19:16:50 -07:00 |
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tlbASID.S
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Update tlbASID.S
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2023-04-27 14:32:57 -07:00 |
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tlbGLB.S
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Comment tlbGBL more discriptively
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2023-05-04 19:13:47 -05:00 |
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tlbGP.S
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complete camline coverage on IFU and LSU
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2023-04-27 14:26:10 -07:00 |
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tlbKP.S
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update tests.vh, add tlbKP to load all lines of tlb
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2023-04-13 15:13:55 -07:00 |
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tlbM3.S
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Add in a test that makes match 3 = 0 for all tlb lines
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2023-04-20 14:50:06 -07:00 |
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tlbMP.S
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complete camline coverage on IFU and LSU
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2023-04-27 14:26:10 -07:00 |
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tlbNAPOT.S
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tlbNAPOT hangs due to PBMT making instruction memory uncacheable, and spill logic not working there. Fixed TLBLRU to update recently used on TLBHit rather than CAMHit. Moved coverage exclusions to proper line in pmachecker
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2023-09-02 12:56:36 -07:00 |
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tlbTP.S
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complete camline coverage on IFU and LSU
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2023-04-27 14:26:10 -07:00 |
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vm64check.S
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Added vm64check tests to cover IMMU vm64
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2023-04-07 21:14:52 -07:00 |
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WALLY-init-lib.h
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Improved NAPOT test coverage
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2023-08-30 21:04:36 -07:00 |
