cvw/fpga/generator
2024-12-03 15:28:39 -06:00
..
debug
ahbaxibridge.tcl
clkconverter.tcl
ddr3-ArtyA7.tcl
ddr4-vcu108.tcl This actually fixes the vcu108 to correctly set the SPI clock frequency. 2024-09-03 13:11:03 -07:00
ddr4-vcu118.tcl
insert_debug_comment.sh
Makefile
mmcm.tcl
probe
sysrst.tcl
wally.tcl Added new debug scripts. 2024-12-03 12:17:10 -06:00
wave_config.wcfg
xlnx_ddr3-artya7-mig.prj
xlnx_ddr4.tcl